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Jitter in Xstal oscillator

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Advanced Member level 4
Dec 1, 2005
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jitter performance pierce oscillator

Doese Xstal oscillator suffer jitter issue? Some Xstal oscillator looks to have
worse jitter performance, how to solve this issue?

try to use higher Q xtals (pricy) and/or play with the loading of the xtal to have the correct one.
In general the xtal osc should be as clean as xtal itself but for sure and VDD /GND noise will couple. Also the length of a trase on PCB from xtal to osc does not help.

Sometimes a crystal oscillator is made of pierce type. The load caps are external. The ground reference for the load caps is also external. But the ground reference for the active part of the pierce oscillator is chip internal. If the oscillator shares this internal ground with some digital components there is a ground bounce. This disturb the oscillating period. I have seen miscounting crystal clock because of this jitter effect.

there are some design techniques to solve the problems resulted from low Q Xstals .. for example, the frequency error occuring between a TX and its RX in a Digital Communication System, can be solved by a block called Frequency Estimation & COrrection ..
This envolves calculating the possible frequency errors and estimating one to be the real frequency error among all possible errors .. then correcting all received samples by the opssite of this error to cancel it ..

Hi Omara,

I met different TX & RX frequency error before in GSM RF. I'm wandering
what's the function block details? Oftenly outside the chip we almost can
do nothing but use software different frequency offsets to compensate this
intolerable but within specification frequency errors.
BUT most likely I'm very interesting in how it happens and the way to solve it.

Thanks !!

Hello OEMsystem:

Yes, crystal oscillators (XO) has different grade in noise,
most likely, phase noise, but XO makers tends to call it "jitter".
For fundamental tone XO (1MHz ~ 30MHz roughly),
jitter might be anywhere beween hundreds of ps to under 1 ps.

And untra low jitter (communication grade) XO is very expensive.
But sorry, all the papers are about how to start-up, low current,
temperature compensation,... almost nothing about how to design a
"uLtra low jitter XO"

Guess we need help from a very special group of experts.

power supply noise is one source of jitter at the osc o/p.
Noise can also be coupled by crosstalk from a nearby trace.

Again, use high quality/Q crystals.

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