Romanp
Member level 4
Friends,
Advice please.
PCI Express card get SSC 100 MHz clock and converts it into 125 low jitter clock.
Problem is schematic. Suggested component (by xilinx) has 6 LVDS outputs. Case TSSOP28.
I would want to use component with only 2 differential outputs. Pproblem. Present component (ICS9DB202-01) has only 0.7V HCSL outputs. Minimum swing of requested LVDS or PECL driven inputs is around 750-800 mV.
How to work with HCSL?
Advice please.
PCI Express card get SSC 100 MHz clock and converts it into 125 low jitter clock.
Problem is schematic. Suggested component (by xilinx) has 6 LVDS outputs. Case TSSOP28.
I would want to use component with only 2 differential outputs. Pproblem. Present component (ICS9DB202-01) has only 0.7V HCSL outputs. Minimum swing of requested LVDS or PECL driven inputs is around 750-800 mV.
How to work with HCSL?
