JESD204B Standard - Transmitter Differential Voltage

I want to design a transmitter which is compliant with JESD204B standard electrical specifications and transmitter differential voltage is defined as min 360mV, max 770mV peak-to-peak differential "into floating 100 ohm load".

The problem is that, the output impedance of the transmitter is differential 100 ohm and also the input impedance of the receiver should be differential 100 ohm nominally. If this "floating 100 ohm" that is mentioned in the specifications is the internal resistance that is intentionally placed inside of the transmitter, when we add the input impedance of the receiver the swing will be halved. The second option is that, "floating 100 ohm load" is the input impedance of the receiver and differential voltage that is defined the specifications is the swing at the input of the receiver. Which one is correct?

In other words, in transmitter eye mask, do they measure the voltage levels between the terminals of the receiver, or only between the transmitter outputs without loading it with receiver?

Thanks in advance :thumbsup:

Hi,

I don´t want to read JESD204 standard..

But usually you have
* output voltage specifications, and
* input voltage specifications.

And it is quite usual, that the output specification is "min: 2V differential voltage" and the input specification is "min 200mV differential voltage".

Klaus

The standard is clearly specifying voltage into load, not open circuit transmitter voltage.

FvM said:

The standard is clearly specifying voltage into load, not open circuit transmitter voltage.

Click to expand...

Thanks all for the answers. I thought internal 100 ohm resistance in the transmitter can be also considered as a load.

The ranges are:
Transmitter differential voltage into floating 100 ohm load: 360mVppd - 770mVppd
Receiver input differential voltage : 110mVppd - 1050mVppd

This ought to be pretty much like (or identical to) standard
LVDS (TIA-644). Because this is the pervasive available
I/O resource for "high speed" serial (of course there are
now faster) on FPGAs and ASICs. But you can get a lot
of insight from the app notes for LVDS interface piece-parts.

This ought to be pretty much like (or identical to) standard LVDS (TIA-644).
JESD204B specifies source and load side impedance matching, like other high speed standards (SATA, PCIe).

Regarding driver impedance, JESD204B is different from standard LVDS which doesn't require an impedance matched transmitter.