In phase-locked loops design,simulation and applications(Roland E.best),It is said that----the bandwidth of a PLL is often specified by the 3-dB corner frequency of closed loop.
But in PLL performance ,simulation and design(National semiconductor),It is the bandwidth is drived from open loop ||G(jWc)H||=1.
why?
Depend by application the loop bandwidth can be defined at different loop gain, but usually is defined at unity gain (0dB).
The same in filter design. Sometimes is used 3dB BW , sometimes is used 6dB BW, or even more.
They are related. In the open loop case, you are interested in the bandwidth so that you can determine the phase margin of the PLL. This makes sure the loop is stable. When you close the loop, you are interested in looking at the phase noise and to see if there is any peaking in the response at the loop bandwidth. The peaking is an indication whether you chose the best loop bandwith for noise performance and if the closed loop might be unstable. The open and closed loop bandwidths are close in value but they are not the same value.