Is small phase margin ok ?

[carlson]

Hi all,
Normally the phase margin is larger than 45C or 60. Is it ok if the phase margin is small(for example 30C or 20C) in the regualtor ? Or is it ok that the transient signal waveform is a damped oscillating if only the transient behavior is concerned ?

Thanks for your help!

 

[anhtuan]

hi,
if phase margin small,the circuit will not stable! For example the circuit will run wrong if you change the value of power supply!

 

[invent]

Phase margin of less than 45 deg can cause oacillation is certain conditions.
Unless you can proof that it does not affect that particular application or oscillation won't occur after process variation, then it might be acceptable.

 

[pk3316]

better to keep it higher than 45

 

[carlson]

Thanks!
It means that the PM maybe become smaller in the silicon results or the other varation conditions. Does it right ?

 

[invent]

Thanks!
It means that the PM maybe become smaller in the silicon results or the other varation conditions. Does it right ?

During wafer fabrication, the size and thus the values of resistors, capacitors and transconductance of trasistor will vary.
All of this will cause your phase margin to change.
Good circuit design and layout will reduce this variation.

 

[jeff_zx]

large overshoot

 

[cellphone]

If the 30 degree phase margin you are getting is in a process corner condition, then I guess its fine. But if it is a typical (nominal) sim, then it should be improved. Of course, this is only my opinion.
With load/line transient, parasitic, process variation, different load capacitors, etc the LDO may oscillate with 30 degrees of phase margin. Besides, in an LDO isn't there spec for <1% settling time? If so, you'll have difficulties getting to the right output voltage in the spec window.

 

[iamxo]

if PM is small, settling time will be longer.

 

[mark_nctu]

The phase margin of regulator must be larger than 30 in worse case.

It will get poor load and line transient when lowest phase margin.