the digital circuits' average current is about 20mA,and the peak value is aboat
200mA,my chip is now pad-number limited,so i have no pad for ex-cap,
anyone who have ideas about cap-free ldo for my situation?
thank you!
thank u erikl!
i have read the paper you suggested to me, and am afraid that it may not be available for me.
my circuit need current about 20mA ,but it have a very large and very quick peak value,so this structure is not suitable because of poor transient response. the loading current change from 0 to 200mA in just 200ps~500ps
if i have a ex-cap ,i can filter this current much smoother ,but the chip is pad number limited...
Sure, but: "with only a small on-chip decoupling capacitor of 0.6 nF". 600pF on-chip is small? Ok, if you're willing to spend real Si estate of about 300µm*300µm (in 90nm process) - more than 10 times the area of the regulator itself.
Sure, but: "with only a small on-chip decoupling capacitor of 0.6 nF". 600pF on-chip is small? Ok, if you're willing to spend real Si estate of about 300µm*300µm (in 90nm process) - more than 10 times the area of the regulator itself.
You could use finger caps by metal or MOSFET caps (with ESR though) . A good way is to stack all kinds of caps available:
1. Bottom: MOS caps
2. Middle: finger caps
3. Top: MIM caps
Also, the finger caps and MIM caps can be placed upon the regulator if it doesn't use top layer metals.
Still, 600-pF cap would consume a large die size, but would not be so daunting as you said, I guess.
Right: If the process allows for caps' stacking, you could increase the overall cap density from ≈7fF/(µm)² to perhaps 10fF/(µm)², but it still needs more than 7times the regulator area. Quite ok, if you need it! But not necessarily cheaper (conc. yield) than an additional pin + a 1¢ external cap?
Right: If the process allows for caps' stacking, you could increase the overall cap density from ≈7fF/(µm)² to perhaps 10fF/(µm)², but it still needs more than 7times the regulator area. Quite ok, if you need it! But not necessarily cheaper (conc. yield) than an additional pin + a 1¢ external cap?
You could use finger caps by metal or MOSFET caps (with ESR though) . A good way is to stack all kinds of caps available:
1. Bottom: MOS caps
2. Middle: finger caps
3. Top: MIM caps
Also, the finger caps and MIM caps can be placed upon the regulator if it doesn't use top layer metals.
Still, 600-pF cap would consume a large die size, but would not be so daunting as you said, I guess.
Don't forget that a good practice is to use MOSFET capacitors as supply filters in typical IC design. Even small (<10sq.mm) mixed-signal chip can incorporate a few nF supply capacitance, which should be taken into account during regulator design. This capacitance is effective filter for short current spikes.