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Is it possible that 2GHz memory of 16KB in 90nm process?

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fightforever

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Hi,
I am demanded to design a fast access 16KB static ram of 2GHz in 90nm process of TSMC, the ram can be pipelined, and at least has 3 write ports and 2 read ports. would anyone tell me whether it is feasible? and How to do it? Many Thanks.

I consider the difficulty is the frequency,so I think out a plan to lower frequency: select a ram of 6 write ports and 4 read ports(double of the requirement),working at 1GHz, and serve the 2GHz access pipeliningly, one port for every clock cycle. by this means, we lower the frequency requirement of this 16KB ram, but double its port number. Still i cannot confirm whether it is feasible. Eager for your help!
 

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