inverter design using 0.18um

[mohsen941]

hello every body
i am trying to design a simple inverter using 0.18um CMOS. output of inverter has jumps in the corners, how can i solve this problem?

 

[erikl]

Is it really a problem? Why? If you just don't like it, spend it a capacitive output load.

 

[mohsen941]

so many thanks for your reply, infact i am designing "bootstrapped switch in 0.18um CMOS" and i can not change circuit diagram, would you help me to transistor sizing for this circuit? i have attached the circuit as a picture(M4 and M5 are inverter) in the following link
https://obrazki.elektroda.pl/85_1322502487.jpg

 

[erikl]

would you help me to transistor sizing for this circuit?

Transistor sizing depends on

• output impedance of the source @ Vin
• input impedance of the load @ Vout
• the clock frequency

I'd suggest to study the appropriate literature!

 

[mohsen941]

thanks for your reply, would you please recommend me some refference for transistor sizing?

 

[erikl]

Try the linked PDFs from this thread!

 

[micpro]

thanks for your reply, would you please recommend me some refference for transistor sizing?

The problem you describe above seems to be a typical case for a circuit optimization software. My company (MunEDA) works in this field, you could check our website for case studies.