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Interview Question: Design an inverter for a fanout of 4??

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xstal

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tue inverter fan out of 4

Hi Friends,

I was asked to design an inverter for a fanout of four in an interview. I think it is related to logical efforts. If someone can give complete solution it will be greatly appreciated.

Thanks in anticipation,
 

fanout of one inverter

logical effort ..... hmm wht is it ?/
 

fanout-of-four

no, it's not related to logical effort
but rather electrical effort :)
 

    xstal

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why inverter has fanout of 4

Hi Salma,

Can you explain little in details about electrical efforts
I know it is the ratio of output to input capacitance.

Thanks.
 

sizing inverter fan-out-of-4

u just match your W/L ratio to match the fanout ratio. thats it. its simple
 

    xstal

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interview question design

raghu_836 said:
u just match your W/L ratio to match the fanout ratio. thats it. its simple

So in this case, is the fanout ratio 4:1?
and w/l ratio of all the pmos and nmos have to be 4:1? Can please explain in detail?
Please..

Thanks
 

determining w/l ratio for an ideal inverter

well, what i know is that the logical effort of an inverter is 1
and its electrical effort depends on its output and input capacity
which is also called the fanout
the effort of a gate or the gain of a gate is ( logical effort * electrical effort )
 

    xstal

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what is fanout inverter

If you happen to come across some more information relevent to this topic, please share with me.

Thanks
 

Re: Interview Question: Design an inverter for a fanout of 4

search google you will find ton of information
 

Re: Interview Question: Design an inverter for a fanout of 4

fanout 4 design is already given....
in CMOS VLSI DESIGN Neli Waste and Harris....
 

Re: Interview Question: Design an inverter for a fanout of 4

Hi,

Fanout of 4 means,Driving capability of inverter has to drive 4 gates at ouput of inverter.

To maintain this we need to maintain W/L of PMOS 4 times than NMOS.
Since Current is directly propotional to W/L ratio.

Hop u understand.
 

Re: Interview Question: Design an inverter for a fanout of 4

vinod488 said:
Fanout of 4 means,Driving capability of inverter has to drive 4 gates at ouput of inverter.

To maintain this we need to maintain W/L of PMOS 4 times than NMOS.
Since Current is directly propotional to W/L ratio.

.

Dear Vinod,
We have to make the W/L ratio of PMOS 2 to 3 times that of the NMOS to compensate mobility factor in order to achieve equal drive strength for both the pull up and pull down network. Increasing size of PMOS will only strengthen pull up... what about pull down? Even if I increase the size of the whole inverter than how do we decide which particular size of inverter will have a fanout of one which we can later upsize by a factor of four?
Hope I have made myself clear to you.

Thanks.
 

dude,
I think u have to start with the assumption that the minimum size inverter in that process can drive a fanout of load of 1. then just upsize W/L of both PMOS and NMOS by 4 for driving fanout load of 4.

if u need exact numbers, other details like exact value of the fanout load(i.e how much capacitance),
R-eq of min size inverter, intrinsic cap load , intrinsic i/p cap etc has to be given.

rgds

Added after 2 minutes:

its not related to logical efforts. logical efforts say, how much more effort is reqd to drive the gate, compared to a min size inverer for that process.
 

    xstal

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Re: Interview Question: Design an inverter for a fanout of 4

eda_wiz said:
if u need exact numbers, other details like exact value of the fanout load(i.e how much capacitance),
R-eq of min size inverter, intrinsic cap load , intrinsic i/p cap etc has to be given.

its not related to logical efforts. logical efforts say, how much more effort is reqd to drive the gate, compared to a min size inverer for that process.

Thanks EDA_WIZ for your contribution to this topic, I also thought the same way. But again I have to make assumptions about the size of inverter which can have fanout 1, unless I know to calculate the various caps.

Thanks
 

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