Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Interrupt latency is the time elapsed between what?

Status
Not open for further replies.

kumar_eee

Advanced Member level 3
Joined
Sep 22, 2004
Messages
814
Helped
139
Reputation
276
Reaction score
113
Trophy points
1,323
Location
Bangalore,India
Activity points
4,677
Interrupt latency is the time elapsed between:

1. Occurrence of an interrupt and its detection by the CPU

2. Assertion of an interrupt and the start of the associated ISR

3. Assertion of an interrupt and the completion of the associated ISR

4. Start and completion of associated ISR
 

Re: Solution needed

Hello,

To my knowledge the solution is no. 2
Interrupt latency is the time duration elapced between interrupt invoke and till the CPU starts its ISR.

Mosatafa Halas
 

Re: Solution needed


yeah Mostafa is right
right answer is No. 2
latency is due many factors;
priority,scheduling & other interrupts from devices.
TeE ThE EdE
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top