Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Internal time step error

Status
Not open for further replies.
P

peddada.srikanth

Newbie level 1
Joined
Apr 17, 2012
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,287
Hello

I am designing a 4 port Anisotropic transmission lines in HFSS.

I imported .s4p files from hfss into ADS and i am running simulation with IBIS TX and RX models . In the transmitter section i have kept PRBS frequency to 30gbps . I have included channel simulator. When i simulate the design i am getting an error " Internal time step too small at time 4.64e-10s".

I am unable to solve this error. can anyone hep me with this?

Thanks in Advance
Srikanth
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top