pic avr io expand
Lets start by defining a microcontroller as: "cpu, ROM and RAM and peripherals are on chip, package pins are i/o to the peripherals" and microprocessor as: "cpu is on chip, package pins provides general-purpose memory and i/o buses for external applications to connect to memory and peripherals as needed".
Between these two limits are chips which blur the definitions; you can choose to lose some i/o pins and gain some address bus, so you can expand the ROM/RAM/IO if you need to. Nothing comes free, though, and having this flexibility tends to put up the package size & pin count.
When you have an application you choose the chip to fit; if it needs more memory or i/o than is available on a 'pure' microcontroller, you have to choose something that has more 'microprocessor' characteristics, and put other chips in place to provide the i/o peripherals you have lost.
What you will also find in the microcontroller domain is various techniques for expanding i/o and memory space without all the pins needed for an address bus; examples are I2C (i-squared c) (from Philips originally for use inside televisions) which is two-wire, SPI (Motorola), etc. Nothing in life is free; these may use few pins, but the bandwidth tends to be limited to 100-1000 kbits/s maximum. However you can get chips which understand these protocols and provide some i/o pins, EEPROM memory which can be very useful in situations with limited pins free. They are also useful for comms between microcontrollers.
Beyond that there are homebrew methods you could use to extend the i/o of a microcontroller by using (say) 3 i/o pins to drive a hc138 decoder, one to specify read/write, 8i/o pins as bidirectional i/o to a shard data bus, one to specify 'do a read or write cycle'. With 13 pins and two external decoders you can get access to 8 addresses each of read and write registers. You have to program this 'bus' yourself, your software would have to set the 3 address bits, set the R/W line, set the 'cycle' pin low, read the 'data bus' pins, set the cycle line high, etc., so the bandwidth will be limited; it would probably be better to choose a chip with more microprocessor charactersitics which provides these functions in a hardware address bus.
HTH
Barny