instansiation in VHDL function

[Alka Arora]

Hi,

I have a multiplier in my VHDL function.Instead of using multiplier operator I want to instatiate the multiplier in a function.For example

FUNCTION xyz(xxxxxxxxxxxx)
RETURN STD_LOGIC IS
:::
:::
VARIABLE mult : STD_LOGIC_VECTOR(LENGTH DOWNTO 0);
BEGIN

I want to replace :

-- mult := x*y;

with
u_mult : mult
GENERIC MAP (
INPUT_DATA_WIDTH_A => LENGTH-1 DOWNTO 0,
INPUT_DATA_WIDTH_B => 8,
INPUT_DATA_TYPE_A => 0,
INPUT_DATA_TYPE_B => 0
)
PORT MAP (
a => x,
b => y
z => mult );

 

[TrickyDicky]

you cannot. Entities can only be instantiated inside an architecture.