Im designing a CMOS low noise amplifier and would like to generate the input return loss circles of the amplifier for different values. For example -10 dB, -15 dB and -20 dB. I know that if the amplifier is going to be matched to S11* at the working frequency teoretically the input return loss would be infinity, and is represented as a point in the smith chart. So what im looking for is a manner to generate the various cicles for finite IRL.
By the way...
Im using ADS to design the amplifier.
If I understand your question correctly, you want to generate a Smith Chart ( S11 ) for different values of return loss : -10 dB, -15 dB and -20 dB.
Is that right ?
If I understand your question correctly, you want to generate a Smith Chart ( S11 ) for different values of return loss : -10 dB, -15 dB and -20 dB.
Is that right ?
There isn't circles such Input Return Loss..
Instead, you should plot Available Power Gain circles or Power Gain circles for different input and output terminations.
Or, you can simulate the circuit to find simultaneously match impedance values etc...
There isn't circles such Input Return Loss..
Instead, you should plot Available Power Gain circles or Power Gain circles for different input and output terminations.
Or, you can simulate the circuit to find simultaneously match impedance values etc...
That kind of circles exist. There some article that do that but they not explain how. Their name are constant return loss ( or VSWR) circles or constant mismatch circles. A found the answer in this presentation: https://pesona.mmu.edu.my/~wlkung/ADS/rf/lesson8c.pdf
A more described approach can be found at E. Collins - Foundations for Microwave Engineering.