inout port in the DUT and connection in test bench

[sun_ray]

There is a design with an inout port at the top named port_A. Should this port_A be connected with logic or wire when this design is instantiated inside the test bench? I want to drive a value of 1116 to this port named port_A from test bench.

Regards

 

[dave_59]

See my recent **broken link removed** for an example of modeling bidirectional signals along with other tips for connecting the Testbench to your DUT.