I'm under the impression that a initial block won't synthesize in Verilog...
What I've done is that I'm using a for loop to calculate the values for the lookup table during reset. Just like Dave said, the compiler seems to run through the for loop and store all the values in memory. Thus, the math operations won't synthesize into hardware. This is apparent in my Total LE count as it stays low with or without the calculations.
Or at least I think it's doing all the calculations... The array isn't showing up in my simulation so I'm not completely sure it's there.