Information about slack in clocks

[smith_kang]

information about SLACK

hi
i want to know about slack in case of clock.when we synthesise the circuit it gives negative slack and shows constraints not met.
it this means that negative slack is not good for design and we should have positive slack or something else.
plz clearify this.if i'm wrong then correct me

regards

 

[sawaak]

Re: information about SLACK

Hi,
sure -ve slack is NOT good, basically slack tells u the timing or frequency margin u have, -ve slack means your design doesnt meet the timing requirments u specify, either lower the operating frequency or change your design.

thanks
sawaak

 

[IanP]

Re: information about SLACK

Have a ook in here:
https://www.sun.com/microelectronics/appnotes/802-7510-01/3_0.html
P.3.4 .. negative values

 

[semiconductorman]

Re: information about SLACK

I have a feeling that you don't understand what slack is in the first place ... anyways please go through this link .Its gives you a clear understanding of the slack concept.

www.altera.com/literature/hb/hrd/hc_h51013.pdf

 

[tut]

Re: information about SLACK

SLACK: Difference between required value of timing parameter and actual value. A
negative slack means that there is a timing violation. A positive slack means that the constraint for the timing parameter is satisfied.

See the attached document.. it gives u a basic introduction to Timing analysis..

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