Information about coding techniques for low power VLSI design

[sachinmaheshwari]

can anyone tell me about the "coding techniques for low power vlsi design"
please tell me where i will find an ebook for it

and if you have any ieee papers on coding techniques plz give me

 

[e_ravikumarshinde]

coding techniques

main reason for power consumption in CMOS is switching .
for making your design more power aware first thing you can do is reduce the switching probability.
eg in FSM use one hot coding. It reduces the switching on the cost of area.
In syncronous ckt there is more load on clk (more switching happens in clk edges) which causes more power consumption, you can prefer asynchronous design (depending on your design functionality).

 

[AdvaRes]

Re: coding techniques

can anyone tell me about the "coding techniques for low power vlsi design"
please tell me where i will find an ebook for it

and if you have any ieee papers on coding techniques plz give me

Yeah it's a very interresting point to discuss.
As far as I know encoding techniques depends on the purpose of the divices and the appllications. The Encoding is used:
- Like stated before, a the FSM level using the hot Encoding
- In wire and busses the encoding aims to reduce the switching activity when used for serial interconnect.
In parallel busses another encoding techniques are used like the half distance Encoding etc.

 

[xlxlyu]

Re: coding techniques

gating clock~~~~

 

[AdvaRes]

Re: coding techniques

gating clock~~~~

Sure,
That's a good low power techniques. But, encoding data for low power is another issue.

 

[Nir Dahan]

coding techniques

IMHO it all starts with architecture. do your uArch correctly and you can take it from there.
of course you have to realize what it is that you actually code.

think of some bus switching reduction techniques, FSM partitioning, FSM encoding, high activity nets etc.

as for pure coding itself, I would recommend strongly not to use any for loops when you can avoid them (99% of the time they can be avoided)
not to use arrays, especially not to use array indexing. assignments like

sig <= array[cntr]
or
array[cntr] <= sig

in the wrong hands the above two constructs can be disastrous. it will infer huge constructs like very wide muxes/encoders. with a little bit of thinking you could design it using a different way altogether.

again this is just my humble recommendations, I guess some will dispute me.

ND.
https://asicdigitaldesign.wordpress.com

 

[Peter Chang]

Re: coding techniques

About the coding in low power design, I have some opinions for reference.
Some key issues to make your design to have lower power.
The most important one is the clock speed. Becuse the power is propotional to
the clock frequency. Voltage is for sure more important, however, it won't be
an issue in coding. For some design, by using asynchronous design to reduce
power is also a good idea.
The second one is the switching as the proposed above, it is also an important
issue. For the point, I would like to recommend further that you design a
scheme to be able to turn the inactive portion off. It helps a lot.
The others, like using lower design gate count is also important too.

Peter Chang

 

[laxman dayadi]

Re: coding techniques

hai madam i have ieee paper in low power vlsi please give me guidence
laxman

 

[sunjianhuigou]

a * 7 = a + a<<1 + a<<2 ; right?

 

[vivek_p]

Use gray encoding depending on ur design (
if it has a state machine).....it reduces switching power.

Another technique is operand isolation. It helps in reducing the power associated with redundant operations. More information can be obtained fron internet

Synopsys offers lot of low power techniques which can be performed easily with the help of tools. Refer to Synopsys Low Power Methodology Manual for more information.

---------- Post added at 13:15 ---------- Previous post was at 13:06 ----------

Synopsys Low Power Methodology Manual

**broken link removed**

download using Solvnet User ID and password