Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Information about coding techniques for low power VLSI design

Status
Not open for further replies.

sachinmaheshwari

Member level 4
Joined
Aug 7, 2007
Messages
69
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,743
can anyone tell me about the "coding techniques for low power vlsi design"
please tell me where i will find an ebook for it

and if you have any ieee papers on coding techniques plz give me
 

e_ravikumarshinde

Junior Member level 2
Joined
Feb 8, 2008
Messages
21
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,383
coding techniques

main reason for power consumption in CMOS is switching .
for making your design more power aware first thing you can do is reduce the switching probability.
eg in FSM use one hot coding. It reduces the switching on the cost of area.
In syncronous ckt there is more load on clk (more switching happens in clk edges) which causes more power consumption, you can prefer asynchronous design (depending on your design functionality).
 

AdvaRes

Advanced Member level 4
Joined
Feb 14, 2008
Messages
1,166
Helped
113
Reputation
220
Reaction score
50
Trophy points
1,328
Location
At home
Activity points
7,442
Re: coding techniques

sachinmaheshwari said:
can anyone tell me about the "coding techniques for low power vlsi design"
please tell me where i will find an ebook for it

and if you have any ieee papers on coding techniques plz give me

Yeah it's a very interresting point to discuss.
As far as I know encoding techniques depends on the purpose of the divices and the appllications. The Encoding is used:
- Like stated before, a the FSM level using the hot Encoding
- In wire and busses the encoding aims to reduce the switching activity when used for serial interconnect.
In parallel busses another encoding techniques are used like the half distance Encoding etc.
 
  • Like
Reactions: Vishu29

    V

    Points: 2
    Helpful Answer Positive Rating

    Vishu29

    Points: 2
    Helpful Answer Positive Rating

xlxlyu

Junior Member level 2
Joined
Mar 23, 2007
Messages
21
Helped
2
Reputation
4
Reaction score
1
Trophy points
1,283
Activity points
1,380
Re: coding techniques

gating clock~~~~
 
  • Like
Reactions: laxman dayadi

    V

    Points: 2
    Helpful Answer Positive Rating

    laxman dayadi

    Points: 2
    Helpful Answer Positive Rating

AdvaRes

Advanced Member level 4
Joined
Feb 14, 2008
Messages
1,166
Helped
113
Reputation
220
Reaction score
50
Trophy points
1,328
Location
At home
Activity points
7,442
Re: coding techniques

xlxlyu said:
gating clock~~~~

Sure,
That's a good low power techniques. But, encoding data for low power is another issue.
 

Nir Dahan

Member level 4
Joined
May 19, 2008
Messages
74
Helped
15
Reputation
30
Reaction score
8
Trophy points
1,288
Location
Munich, Germany
Activity points
1,753
coding techniques

IMHO it all starts with architecture. do your uArch correctly and you can take it from there.
of course you have to realize what it is that you actually code.

think of some bus switching reduction techniques, FSM partitioning, FSM encoding, high activity nets etc.

as for pure coding itself, I would recommend strongly not to use any for loops when you can avoid them (99% of the time they can be avoided)
not to use arrays, especially not to use array indexing. assignments like

sig <= array[cntr]
or
array[cntr] <= sig

in the wrong hands the above two constructs can be disastrous. it will infer huge constructs like very wide muxes/encoders. with a little bit of thinking you could design it using a different way altogether.

again this is just my humble recommendations, I guess some will dispute me.

ND.
https://asicdigitaldesign.wordpress.com
 

Peter Chang

Junior Member level 2
Joined
Oct 5, 2006
Messages
21
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,281
Location
TAIWAN
Activity points
1,419
Re: coding techniques

About the coding in low power design, I have some opinions for reference.
Some key issues to make your design to have lower power.
The most important one is the clock speed. Becuse the power is propotional to
the clock frequency. Voltage is for sure more important, however, it won't be
an issue in coding. For some design, by using asynchronous design to reduce
power is also a good idea.
The second one is the switching as the proposed above, it is also an important
issue. For the point, I would like to recommend further that you design a
scheme to be able to turn the inactive portion off. It helps a lot.
The others, like using lower design gate count is also important too.

Peter Chang
 

laxman dayadi

Newbie level 1
Joined
Dec 16, 2009
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
hyderabad
Activity points
1,284
Re: coding techniques

hai madam i have ieee paper in low power vlsi please give me guidence
laxman
 

vivek_p

Advanced Member level 4
Joined
Feb 16, 2010
Messages
115
Helped
10
Reputation
24
Reaction score
9
Trophy points
1,298
Activity points
2,009
Use gray encoding depending on ur design (
if it has a state machine).....it reduces switching power.

Another technique is operand isolation. It helps in reducing the power associated with redundant operations. More information can be obtained fron internet

Synopsys offers lot of low power techniques which can be performed easily with the help of tools. Refer to Synopsys Low Power Methodology Manual for more information.

---------- Post added at 13:15 ---------- Previous post was at 13:06 ----------

Synopsys Low Power Methodology Manual

**broken link removed**

download using Solvnet User ID and password
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top