Inductor core saturation test, making sense of waveform.

[David_]

Hello.

I have a real hard time getting to terms with the concept of inductor core saturation, I do get what saturation means and that it will make the inductance fall. But how to work out a cores max current is a mystery to me and that will be discussed in another thread but here I have made a circuit to measure the saturation current.

Its just a 12V power supply, capacitor bank, inductor under test followed by N-channel MOSFET who's gate is driven by a function generator.
a current sense resistor follows the MOSFET and this is the result:


I had hoped to see a slope which at some point starts to rise rapidly as the saturated core results in a faster rising current.

What am I doing wrong or am missing?

 

[D.A.(Tony)Stewart]

L/R is your transient time constant and since V is big (4V) that means R is too big which makes rise time L/R too fast.

Choose your shunt series resistor for 50 to 100mV max. and/or make it much smaller (10%) than ESR of inductor. USing the ground side for single probing but use Coax terminated by 50 Ohm at scope when using shunt resistors <<1 Ohm for best frequency response. or use terminal pair near source using coaxial barrel & tip of probe with probe tip and ground wire removed for reasonable accuracy but not best.

If you are planning to use continuous mode DC + triangular ripple then test it this way.
If using discontinuous mode too, test it that way too.

Adjust average power using PWM or fixed pulse PFM. When eddy current losses are same as wire losses, you may be reaching saturation in a good balanced design.
You can capture Voltage current and compute power on a DSO or dump to PC XLS , if you know how. Then estimate , compute and measure dL/dT [uH/'C] saturation threshold. ( % change per deg C ) and dL/dI ( % L drop with rising current.)


Other DESIGN INFO
Normally Inductance is done by a constant current source sin (CC Sin) wave with DC bias and voltage is proportional to inductance. and f.

Amp-second is main metric for pulses, but Self Resonant Frequency. (SRF) is also important.

Mount an epoxy adhered thermistor for T monitor and can use for feedback and fan speed control with an 0.5V LDO, ADJ buffer transistor and pot. when/if cooling design is required.

 

[mrinalmani]

As already pointed out, the total series resistance is probably excessively large.
But anyway this method for determining the saturation current doesn't look very promising to me.
Firstly because there'e no sharp line for saturation. And secondly, the inductance is many a times, a non monotonically increasing or decreasing function of current. So a negative slope in the inductance value may be mis-interpreted as saturation point.
There are tools available from core manufacturers that calculate the number of turns and core size for a desired inductance value. Search The 'micrometals' website for one such design tool


Look at a typical inductance vs current graph in the attached figure

 

[David_]

Okey, that answer will take some time to soak up. A lot of things to read about to be able to understand, many new things for me.

However I did try swaping out my 0,32Ω sense resistor for a 0,052Ω resistor but the result was this:


I do understand that I need to slow down the current rise, could it be a problem in this case that I am using a 16,5A power supply and a 8800µF capacitor bank?
Might a weaker supply slow things down?

I have previously built a circuit to display B/H curves of cores on my scope, I should just as easily read saturation from that no?
I have read that I should be able to find that that way anyway, but I'll guess that such a approach would need some math to get the current.
I have always doubt that solution because while displaying those BH curves I am using a very low current supply and while reading about stuff I have gotten the Idea that to test for or to find saturation current you need to exceed it.

I can't sustain this level for long or the solder joints melts, I should have used a math channel to display in Amperes but the sense resistor is 52mΩ:


I have been soldering and measuring through the night and I am burned so I might have the obvious in front of my nose only to find it later after some sleep.

Oh I see, I did misunderstood which resistance that posed a problem.
I am trying to characterize unknown cores and am partly doing this just to understand.

 

[chuckey]

As I see it if the current waveform has a flat top the magnetic field is "fully charged", there being no back EMF to oppose the voltage source of the current. So change the waveform to a saw tooth, pretty basic, the current increases linearly until the core starts to saturate then the current will increase exponentially.
Frank

 

[Vbase]

Hello.

I have a real hard time getting to terms with the concept of inductor core saturation, I do get what saturation means and that it will make the inductance fall. But how to work out a cores max current is a mystery to me and that will be discussed in another thread but here I have made a circuit to measure the saturation current.

Its just a 12V power supply, capacitor bank, inductor under test followed by N-channel MOSFET who's gate is driven by a function generator.
a current sense resistor follows the MOSFET and this is the result:
View attachment 116783

I had hoped to see a slope which at some point starts to rise rapidly as the saturated core results in a faster rising current.

What am I doing wrong or am missing?

Hi David,
Keep on reducing the frequency (increasing the pulse width) and you will get plenty of saturation. Saturation is current X time.

 

[KlausST]

Hi,

can you tell us more about the DUT?
What DC resistance do you expect?
What design ist it? air core(most probably not)? closed core, ring core?
What currrent rating do you expect?

We need this to get a clue of the inductance and it´s behaviour.

Your test circuit: does it use a free wheel diode across the DUT?
250mV across a 52mOhms resistor means 4.8A. with a 12V supply and aproximtely 40% duty cycle this means 23W of power loss. So something is getting really hot. Is it the inductor?
It seems there is a 2.5 Ohms resistor in the circuit.. (L? FET? somewhere else? )

A picture, a schematic?

Klaus

 

[David_]

I can't understand why I have such a big problem with grasping this but I have found that using a USB-device in place of a real scope makes things weird but I guess you get used to it(though that might not be a good idea )
My Analog Discovery(AnD) has better specs than my only scope so I'll go with that until I can afford a good scope.

Did anything get hot?
Oh yeah, the heat-sink for the FET was not to be touched, I could feel the heat in my face sitting at the desk.

Here a few details anyway, in the schematic I left out 4 2200µF caps right after the power supply.


Here the leads to the AnD is removed so every component is visible.


In the pictures of waveforms so far the same inductor as in the picture above was used, I know full well what that is:
https://katalog.we-online.de/pbs/datasheet/74435586800.pdf
Inductance = 68µH
Rated current = 7.5A
Saturation current 9.5A
DC resistance = 27.3mΩ
SRF = 5MHz
But I have used two other cores wound my self and they give the same sort of waveforms. Its the two most upper in the picture below.


All unknowns.
They have all been re-wind except for the CM-choke at the left side, although its only the two coils that is highest up in the picture that is of most immediate interest.

All I am really trying to do is find a setup with which I can hook up a coil and in a couple of minute's know that I can put this and that much current through this before the inductance falls off, if a coil is used in a buck converter which input is 30Vdc. Does that coil have a 30V DC bias?
Or is a DC bias some constant level when talking about coils and its core?

I am about to test the B/H circuit I have made again to see what that gives.

When fiddling with the setup that produced the waveforms show so far I have tried the hole range of duty cycle, frequency and amplitude of gate voltage. The coils I am about to use will be used in a buck converter and I hope not to go above 200kHz for the switching frequency.

By the way, I really like the power supply used here. Its a XBOX supply that I have opened and highjacked the "Power good" signal with a flip-switch and mounted connectors to get access to its 5V 1A and 12 16,5A. See attached pictures.

 

[KlausST]

Hi,

if FET gets hot, then i is likely that it is not fully ON, not low ohmic.
Try to drive gate low ohmic (about 50Ohms) push pull and with 0V /12V.
But be aware that noe the current is much higher than before. Something else may get hot.

********

For sure if current is only 4.8 A the core will not saturate (9.5A). Therfore you won´t see the expected waveform.

********

For future tests:
* set a short pulse for testing, then a long pause to avoid overheating while testing with high currents. Maybe 1:100 is possible.
* i´d co for a "overcurrent switch off". Needs high speed current measurement with an comparator to clear a flipflop.


Klaus

 

[D.A.(Tony)Stewart]

broken link removed

Ron < Rshunt and < Rs of coil. for measureable equal IR drop.
Adjust Vgs pulse to CH1 and Igs Ch2 then Ch1 vs Ch2 XY mode.
Adjust duty cycle for variations in DC.
Add parallel FET for steady DC load or adjust DC bias with AC triangle pulse

Unless planning to run complementary currents with no DC.
You can use AGC on pulse current and sweep f vs I max on time scale for eddy current losses. or even plot conduction losses with Eddy current losses vs I with DC vs f... if you want to get fancy. with detectors and use FM gen with sawtooth sweep for X from scope, then even make log sweep. from signal conditioner on sawtooth

 

[E-design]

Here is a similar test setup demonstrated on YouTube.
https://www.youtube.com/watch?v=FjLfrrwpjBs

 

[David_]

I will take all notes under advisement and try to adjust the setup, just to say that the pictures of waveforms which translates to 4.8A is pictures where I have dialed down the the gate voltage as much as I can while still be presented with a stable waveform(the Analog discovery triggering can be somewhat problematic). but is it saturation that is causing this then:


In the case of this core the saturation current is 9A something, I had not considered that all the other cores tested might also be able to operate with a higher current than what I have supplied them...

 

[D.A.(Tony)Stewart]

In a 5MVA transformer I just used a 3.7V LiPo and measured dI/dt with 22 Henries and when the slope doubled after 30 seconds, I called it "saturated threshold". Initial condition on Remenance must be known , small or degaussed or tested in a bipolar manner.

Similar to the Youtube demo, I think.

Also when I released the LiPo I got a nice glow arc.

- - - Updated - - -

It's pretty easy to use any sig gen for Vgs with 50 Ohm variable peak and adjustable DC offset with pulse voltage and current sense 50mV max with 50 Ohm termination on coax.

For a 5 Ohm gate drive thats easy to make too.