I am facing this problem, which is causing the two push-pull MOSFET to extreme stresses.
I am using this to power TAS5630 amp. the boost converter is converting the 12V DC voltage to 36V DC (unregulated). As this is a car amplifier so the battery voltage can be 10V to 14.5V.
Everything is ok upto 13.5V DC input. But when the input voltage is higher than that, inductive spike is seen at the MOSFET drain and they becomes hot.
At 13.8V or higher the kick exceeds the max Vds 40V and the FETs are starting to runaway.
I have attached some screenshot and unsnubbed oscillation at MOSFET drain. Please help me to remove the inductive kick @15V.
Either inductive kick becomes stronger, or a part of your circuit is acting slowly at a time it ought to limit voltage immediately.
Your snubbing networks C66-R84, and C70-R91, may need replacing with diode-C-R networks. I've seen those work well in simulation, to handle large inductive current spikes at turn-off. I'm not an expert, so I could be wrong.
Either inductive kick becomes stronger, or a part of your circuit is acting slowly at a time it ought to limit voltage immediately.
Your snubbing networks C66-R84, and C70-R91, may need replacing with diode-C-R networks. I've seen those work well in simulation, to handle large inductive current spikes at turn-off. I'm not an expert, so I could be wrong.
It's not obvious at first sight why the drain overshoot changes drastically with inverter input voltage. Presumedly there's another variation in circuit operation conditions, e.g. inverter output current or transformer magnetization current along with the voltage variation. It would be helpful to see a drain current waveform.
The general problem of a transformer push-pull is that energy stored in transformer leakage inductance can't be recovered and must be burned somehow, either in a snubber or avalanche breakdown of the output transistors. The only reasonable method to increase inverter efficiency is to make a transformer with less leakage inductance.
The present non-isolating inverter circuit offers an alternative clamping option to the secondary 36V node. I fear that 40V Vds,max is too marginal for a 12V supplied transformer inverter which can already reach 30V without any overshoot.
Probably this is caused by the primary leakage inductance. I am thinking about rewinding the transformer. Is there any tips or guide about the winding procedure so that leakage inductance is minimum ?
You need to wind all the coils as one, and bring out tails as needed, the closer the pri-sec wires are to each other the lower the leakage inductance and hence the lower the turn off spike, keep lead out wires as short as possible and put big foil caps across the power Vcc as close to the Tx and fets as possible, keep all power loops as small in area as you can create...
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you will likely need some snubbing on fets and o/p diodes as well....