hi all can any body explain me how i can implement an anolog component in VHDL programing lang. please explain any alternative and flow to be followed as i need capacito in PLL design and also inductor in corresponding circuit with the values as capacitor of .20 uf and inductor of 3mH.
Hi
As I know VHDL can not model analog devive such as inductor and capacitor nor resistor and transistor.
VHDL designed to model logic circuit and its signal delays.
so there is no way to implement anlog circuit using VHDL is this right or there is any other alternative for implementation of the anlog devices in VLSI please let me know.
Analog components can be usually simulated with sufficient accuracy by approximating the differential equations with difference equations, using a constant time step.
I dont work on it. I asked this question from my friend, he said you can use VHDL-AMS (VHDL- Analog and Mixed signal Extension). https://en.wikipedia.org/wiki/VHDL-AMS