Import Hspice file which includes a Verilog-A module in ADS

[happystar]

Hi!

I am trying to use the Hspice compatibility feature of ADS, the .sp file I wrote include a Verilog-A module. I am attaching the .sp and .va file here. For illustration, I use a .va file for a resistor downloaded online.

But after I import the .sp file, ADS seems can't compile the .va file correctly.

The simulation status is the following:

Simulation / Synthesis Messages

Error detected by hpeesofsim during netlist flattening.
`r_hl.xr_hl' is an instance of an undefined model `res3'.

Status / Summary

hpeesofsim (*) 2008.500 Jan 22 2008 (built: 01/22/08 22:02:45)
Copyright Agilent Technologies, 1989-2008.

Loading Verilog-A module 'res3' from
'e:\ads\hpeesof\agilent-model-cache\cml\1.42\win32/hspice_05532_20091215_223754_000041/lib.win32/resistor_hl.cml'.
--------------------
Simulation terminated due to error.
--------------------

I am pretty sure the Hspice compatibility feature is no problem, 'cause I successfully imported other files without .va included, and the simulation works.

What did I do wrong here?

Thanks a lot!!

 

[happystar]

Any one can help me? Thanks!!