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Image vhdl code in to fpga syntheis

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kambhampati9

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Hi

present i am doing master thesis on Image processing using Image Enhancement technique

My task is ( Image enhancement technique implement in vhdl then code send to the nexys 2 board ).

Is this board suitable for this application ?

am using 64*64 image.

if its possible,then how can i take the output from the FPGA.


can i take the output from VGA.?

I did simulation part.

I dont know how to do synthesis part,How can i assign the pin configuration of 64*64 image size,each pixel is 8 bit..


please help me sir
 

I did simulation part.
That means, you have already an image memory respetively a frame buffer in your design?
how can i take the output from the FPGA
You should consider a serial data stream, as involved with any digital video format. You need at least a frame sync (VSYNC) and a pixel clock as control signals to transmit the data pixels in parallel.

Assuming your image is stored in a RAM memory, this would imply a counter that sequentially scans the adddresses. Generally, you'll find a lot of digital video HDL stuff on the internet, e.g. at opencores.org or at the FPGA vendor sites.
 

hi thank you for your reply,

I have one more question,

i have nexys2 (Diligent board).i created RAM for image.

can i take the output from VGA ?,to display the image back.

How can i assigne pins ?

Now i will read opencores.org


thank you,
 
Im not using Xilinx or the Digilent board in particular. But I noticed, that a VGA reference design is available for it from Digilent. It should clarify how to connect the pins.
 

hey me now working on a project of processing image in VHDL. i hv got the pixel values of the image. now need to process matix in VHDL. as per ur post u said u hv done simulation no can u plz guide me with it?
 
Hi

present i am doing master thesis on Image processing using Image Enhancement technique

My task is ( Image enhancement technique implement in vhdl then code send to the nexys 2 board ).

Is this board suitable for this application ?

am using 64*64 image.

if its possible,then how can i take the output from the FPGA.


can i take the output from VGA.?

I did simulation part.

I dont know how to do synthesis part,How can i assign the pin configuration of 64*64 image size,each pixel is 8 bit..


please help me sir


hey . . i m also looking for thesis on image processing with vhdl.
can i have your thesis report. i want to read it . . m not getting any problem to proceed as thesis . .
can you suggest me one please.
thnx .
 

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