A simulink model cannot be converted into system generator module as I said, you might need to use black boxes in cases where you dont have any system generator block to perform the desired operation such as a dedicated sequential logics, drivers, etc.
Import your verilog\vhdl file into system generator using black box block. tell more about your design and the blocks you are trying to use.
---------- Post added at 12:23 ---------- Previous post was at 12:22 ----------
Update: You can still do it 100% using Matlab's HDL convertor