IIR filter for DPLL loop filter

[ahmad_ee]

dpll iir

Hi All,

In an all digital PLL, with the loop filter as an IIR filter, when transforming the design to fixed point the loop filter was found to need a large number of fraction bits to keep the performance, although this large number is not required by the DDS input !!
Is it regular for that filter to need so large number of bits, I thought it would due to being an IIR and so memorizes the signal from so many cycles in the past !!

Regards,

 

[ylscqu]

round off or something like truncate can solve this problem.Who can provide
some example?thx

 

[zorro]

Hi Ahmad,

tuncation produces dc-residual, that is a special case of limit cycle.
For instance, in a type-2 loop you can have a non-zero steady state phase error, althougt in that type of loop one intends to have zero error.
How is your filter, and which is the loss of performance?

Regards

Z