If the Hspice support the EKV model

[Jenifer_gao]

bsim2ekv

Hi All:

Anyone know if the Hspice support the EKV model? It seems not according to the EPFL-EKV website, but I am not sure.
If it supports, can you tell me the information, or the useful link.

Thanks.

J

 

[ambreesh]

hspice ekv model

Dear Jenifer_gao,
HSPICE level55 models are for the same. It is for bulk reffered devices
This is what the hspice manual release 2001.2 says.
But you should have the model parameters.

 

[Jenifer_gao]

how to use ekv model

Hi Ambreesh:

Thank you for the reply, the manual you mentioned seems the start-Hspice. If the star-Hspice is same as Hspice?

HSPICE level55 models are for the same. It is for bulk reffered devices
This is what the hspice manual release 2001.2 says.
But you should have the model parameters.

Thanks.

J

 

[ambreesh]

tsmc ekv

Dear Jenifer_gao,
Yes star-hspice is same as Hspice.
Avat sold HSPICE to synopsys
If you donot have the manual I can upload it.

 

[Jenifer_gao]

adalog ekv book

Hi Ambreesh:

Thank you for the clarifiction. I already got one manual from the internet. Thanks. But can I have another question for you:

Many design packages don't provide EKV model, but most of them provide BSIM model. That means I have to create the EKV model parameter files by myself. I know EPFL has a tool called BSIM2EKV, and I tried to send a request form to ask for it, but I didn't get answer. My question is if you have ever created EKV model file by yourself, especially for submicron technologies? If you did, how did you do that? Any suggestion will be appreciated. Thanks.

J

 

[ambreesh]

ekv model 2.6 3.0 differences

dear Jenifer_gao,
I have never done so. But you could mail to Nathan on edaboard, he was looking for the same.
A very helpful person

 

[cascode]

ekv analog designer

dear Jenifer_gao

I have some experience with the EKV model, since I have done several very low power design, and I use it extensively for analog design, due the 'level of inversion design methodology' (see reference below). There is a utility from EPFL called BSIM2EKV that will generate an EKV 2.6 model from BSIM3V3. It is not perfect, but a good starting point. Remember that are fitting to a model, that in itself is not perfect!. If it is possible to get actual transistor data, that is better.

Typically, some fine tuning will be required to get the best model possible, since BSIM2EKV uses a 'blind' software optimization method. In general, with EKV 2.6, you can get pretty good matching from low to moderate gate voltages (relative to the process). At high gate voltrages, the lack of second order mobility model makes it more difficult to get a good match both in linear and saturation region. It is usually relatively easy to get a pretty good match for wide/long and wide/short. Getting the same model to match well for narrow/wide and narrow/short is more difficult. However, in general, the gm/id curve will give good results, even if the voltages are not perfectely matched, since it is inherent to the model.

The upcoming EKV 3.0, being right now in the process of being implemented in simulators, will scale much better and should be a superior model for all technologies, down to <0.1um.

A refernce on general usage of the EKV model:
https://legwww.epfl.ch/ekv/workshop/pdf/2_EKV_UMW04_Patrick_Mawet.pdf

 

[andy2000a]

ekv model

which Fab use ekv model ?? as I know tsmc umc no this model , what "big" difference between EKV model and bsim ?

 

[ambreesh]

difference of ekv from bsim3v3

Great difference as far as i know.
Look at the no. parameters needed for HSPICE 49 model and still it cannot model sub-threshold well. EKV need around 20 parameters , and does a good job. for subthreshold design.
EKV models are bulk reffered but bsim are source reffered. Both have advantages and disadvantages.
Tsividis book mentions in detail on pros and cons of the same

 

[Jenifer_gao]

tsmc ekv model

Hi Cascode:

dear Jenifer_gao

I have some experience with the EKV model...
you can get pretty good matching from low to moderate gate voltages (relative to the process). At high gate voltrages, the lack of second order mobility model makes it more difficult to get a good match both in linear and saturation region. It is usually relatively easy to get a pretty good match for wide/long and wide/short. Getting the same model to match well for narrow/wide and narrow/short is more difficult. However, in general, the gm/id curve will give good results, even if the voltages are not perfectely matched, since it is inherent to the model.

A refernce on general usage of the EKV model:
h**p://legwww.epfl.ch/ekv/workshop/pdf/2_EKV_UMW04_Patrick_Mawet.pdf

Thank you for the reply. I am glad to know that you have some experiences with EKV model, so that I can ask some questions in detail. I have asked for this BISIM2EKV tool from EPFL, and I am expectiing to use it. My questions with this EKV design are:
1. What technologies (0.5um, 0.35um, 0.18um...) did you use with your EKV design? I am tring to use 0.18um technology with short channel length, and some people said the EKV only works well for long channel length. How do you think of it?
2. When you say match, do you mean you compare the result from the simulation with the measured result?
3. If your design has the current mirror, what region you will assign to those current mirror transistors (weak inversion, moderate inversion, or strong inversion)? One paper I have read said it's better to make current mirror transistors working in the strong inversion region because of better matching. How do you think of it.

I will really feel appreciated if you can kindly give me some advices. Thanks.

J