mordak
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Hey guys,
I have a basic question. I built an ideal opamp in cadence using veriloga, ahdl library, and VCVS. I don't know, maybe I made a mistake, but none of them works when I use them in a switched cap (SC) circuit.
When we define an ideal opamp, we say that output would be difference between opamp inputs times a gain. So if I use this opamp in a switched cap circuit that basically works based on charge preservation, output won't be what it should be. I think it could be because of the way I defined the opamp, that amplifies voltage difference between inverting and non-inverting inputs. However, in a circuit like SC, both inverting and non-inverting ports have the same voltage, equal zero, and only charge would be transferred from Cs to Ci. Am I right or I missed something? Any hint would be appreciated!
I have a basic question. I built an ideal opamp in cadence using veriloga, ahdl library, and VCVS. I don't know, maybe I made a mistake, but none of them works when I use them in a switched cap (SC) circuit.
When we define an ideal opamp, we say that output would be difference between opamp inputs times a gain. So if I use this opamp in a switched cap circuit that basically works based on charge preservation, output won't be what it should be. I think it could be because of the way I defined the opamp, that amplifies voltage difference between inverting and non-inverting inputs. However, in a circuit like SC, both inverting and non-inverting ports have the same voltage, equal zero, and only charge would be transferred from Cs to Ci. Am I right or I missed something? Any hint would be appreciated!
