hi everybody,
i designed a circuit on which there are some I/O ports. I will have it tested for CE certificate in a few moths. some I/O ports are entering the board through MAX232 ic (RS232 interface), MC3487(rs422 interface) and some are directly go to the microcontroller (18F6527). does this configuration cause any problems during the conducted emission tests?
1.) CPU clock signal. Try to make them as short as possible.
2.) Clock buffer out from cpu. If the cpu has a buffer clock out then add a RC ( lowpass ) directly at this pin out to avoid high order harmonics leak through the traces
3.) EMC filters or toriod should be added.
4.) Use multilayer pcb e.g 4 layers to hide all the traces to inner layers
Hi,
I have similar problems when trying to pass 1kV Burst test (EN61000-4-4) on signal lines.
Input: OPAMP for temperature sensor. Varistor protected for ESD pulse. Input resistor 2k.
During Burst test the microcontroller behind the opamp tilt.
I would like to try SMD chokes on input lines but I do not have any idea for size/core material/value.
Does anybody had success with a input choke/ferrite?