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[SOLVED] I have problem with SPI Connection

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Eicalos

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I have two file.
- SPI_Master.vhd
- SPI_Slave.vhd

I can't use Quartus II to compile and simulation because it has problem with top-entity.(It can have only 1 Entity)

Now I try to use Model Sim but I don't understand how to write testbench file with 2 vhd files. I can write testbench for only 1 vhd file.

Plz help me!!!
 

You can instantiate as many entites as you want in the top level file.
 

Please show me. I'm newbie in VHDL.

If I make it successful in Model Sim. I must use Alter Quartus II to create Bitstream file and Burn it into Cyclone III.

I wonder how to do it. I can't use Quartus II to make it because it force has only 1 entity.
 

Entity instantiation has nothing to do with files. You can have multiple entities in 1 file (but usually you put 1 per file)
You can have as many files as you want in any project.

What is the problem exactly? just create a 3rd file that instantiates both the master and slave (but why would you, unless you have multiple channels)

What are you trying to do?
 

Entity instantiation has nothing to do with files. You can have multiple entities in 1 file (but usually you put 1 per file)
You can have as many files as you want in any project.

What is the problem exactly? just create a 3rd file that instantiates both the master and slave (but why would you, unless you have multiple channels)

What are you trying to do?

My work have two entity each entity have many process. My professor want to connection two entity with SPI Bus System.

Now I begin to understand I must create another file to use for implement 2 files with other.
 

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