whitewiz
Member level 3
Region 3 in cadence
For cadence schematic simulation, I used a bipolar transistor(BJT) for low noise amplifier design and simulated in DC analysis.
BJT is always working in region 1 or region 3.
I am so wondering region 3 is saturation region or breakdown region.
I attach the picture for your consideration.
Thanks
For cadence schematic simulation, I used a bipolar transistor(BJT) for low noise amplifier design and simulated in DC analysis.
BJT is always working in region 1 or region 3.
I am so wondering region 3 is saturation region or breakdown region.
I attach the picture for your consideration.
Thanks