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No CPLD has dedicated I2C hardware, I think. But any CPLD can implement I2C master or slave functionality (with sufficient logic elements). Also 5V tolerance is required unless you don't want to use external driver transistors or logic gates.
I remember a FPGA I2C slave, that used between 50 and 100 logic elements, roughly similar to CPLD macro cells. It has been a synchronous design driven by a system clock, an asynchronous (bus clocked) interface possibly can have a somewhat lower resource count. I suggest to start with a vendor and tool chain that you have used before. Look out for other suppliers, if the known solution seems not to fit your requirements.
If you are new to the programmable logic field, I would suggest Lattice as the vendor with the most versatile CPLD choice and A.ltera as my favourite FPGA supplier.