i am in need to get 400khz clock from 40mhz master clock....

[velu.plg]

i am in need to get 400khz clock from 40mhz master clock. i can't use clock divider.

 

[FvM]

There are no PLL blocks in ASIC. Clock divider is the only option.

 

[D.A.(Tony)Stewart]

what other restrictions? requirements? what accuracy?
/100 is the cheapest way.

 

[dpaul]

i am in need to get 400khz clock from 40mhz master clock. i can't use clock divider.

Were you asked this as an interview Q or what is it that you want to do?
Look at this thread: https://www.edaboard.com/threads/341476/.
Here the OP, sam93, in #6 says he doesn't want to use a clock divider and then in #17 he says that he wants to achieve this by clock division and using a counter. A classic example of misleading people (perhaps the OP didn't understand what he had at his disposal and what he wanted to achieve) who want to help!

Well you may build a model which has 10x 'divide-by-10 counter', but as mentioned above, this is not best-practice and is not the cheapest way.