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hysteresis comparator design

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santhoshv78

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I need to design a 'cmos hysteresis comparator'. I am looking for some reference schematics. please somebody help me.
thanks
 

cent24.3

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Hello,

What do you mean by 'cmos hysteresis comparator' :?:

Is it ( (a comparator with hysteresis) in cmos technologie ) ?

Or (a comparator of (hysteresis of cmos technologie) ) ?
 

santhoshv78

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it is a comparator with hysteresis in cmos technology.
thanx
 

leo_o2

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You can use positive feedback to have hysteresis.
| |
| ______________|
|________|_____ |
|____ | | ____|
|_ | _| |_ | _|
_| |----| |_ _| |----| |_
|________| |________|
 

djalli

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cent24.3 said:
Hello,

What do you mean by 'cmos hysteresis comparator' :?:

Is it ( (a comparator with hysteresis) in cmos technologie ) ?

Or (a comparator of (hysteresis of cmos technologie) ) ?
What he means in another words to design a schmidt trigger in CMOS which is to design an inverter/comparator as a group of transistors to behave as hysteresis comparator which is another word for Schmidt trigger.

I know how to do this using opamps(BiCMOS, LInMOS,CMOS opamps...if they are deigned so...) but I am not precisely exactly sure in using transistors. Need more info from santhoshv78 as more details as else as he maight look for.

djalli
 

amarnath

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the whole design procedure is given in cmos analog circuit design by allen holberg..please refer to the chapter named coparators....

regards
amrnath
 

fashion

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The design of a comparator with hysteresis ,you should let loop as positive feedback,with an active load, then you can get the purpose you want.
 

djalli

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santhoshv78 said:
I need to design a 'cmos hysteresis comparator'. I am looking for some reference schematics. please somebody help me.
thanks
lets ask this guy straight:

You have a nearly random signal having peak amplitude 12 volts , minimum is 2volts, other amplitudes (of signal and as much as you like) are in that range.

Where , what voltage level, do you want the comparator to kick off hysteresis?

Higher than 3.1volts is a 9volts (or logic high 5volts) and less than that is 0volts? Give us an example! I will make you I will illustrate it fully. Tell us how do you want this hysteresis comparator designed.

djalli
 

anadigi

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Maloberti's book is a good reference.
U can dl it from the board.
 

santhoshv78

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Tell us how do you want this hysteresis comparator designed
Sorry for not giving full information,
I understand that there is two ways in designing hysteresis comparator. One is externaly, providing the positive feedback using resistors. Other is internal positive feedback. Second one is my requirement.
I have found the details in Allen Holberg's CMOS analog circuit design book as stated by 'amarnath'
The requirement is, the comparator should not sense the noise in the signal which is arround 100mV. I could able to design the comparator as required. But without hysteresis also, the comparator is not detecting the noise!!.. :) . Is it because the comparator is less sensitive?. If so, hysteresis is really required or can I use the simple comparator which is less sensitive.
thanks for all the help.
 

djalli

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Actually this is a very common mistake to believe hysteresis comparator (another word to approximate is a Schmidt trigger) cleans noise.

No it does not even if so many books say so. It just rounds amplitude numbers. That's all. How many believe Faraday's Law dealing Inductor in circuit is right? Believe it or not is not correct in most of books. Pay attention to what you are reading. Try to use some imagination.

The comparator is an open-loop op-amp. It is designed for comparing two voltages. That is all!

If the inverting input voltage is fixed to constant voltage (called threshhold) of an open-loop op-amp other than zero, a threshold comparator is constructed.

On other hand there is another enhanced threshhold comparator called hysteresis comparator. On threshhold comparator you set a FIXED threshhold and nothing on earth can move it. In hysteresis comparator the threshold voltage(s) is not fixed and varies with the output voltage. You have too look how circuit is connected.

On hysteresis comparator two stable states will then exist. Present state is depended on both present input and the past history of the circuit. This property is called hysteresis or exibiting a posistive feedback for the op-amp.
 

santhoshv78

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In hysteresis comparator the threshold voltage(s) is not fixed and varies with the output voltage
let me put it in this way,
In the diagram as shown, the threshold comparator, may give an output which is changing its level continuosly.( high - low)
But the hysteresis comparator ( with atleast 100mV hysteresis) will remain in the same state.
is this correct??
If the threshold comparator itself is designed so that it canot sense the 100mV difference??
 

djalli

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But the hysteresis comparator ( with atleast 100mV hysteresis) will remain in the same state. is this correct??
Correct will keep its stable state.

If the threshold comparator itself is designed so that it canot sense the 100mV difference??
Here is the difference in better words: Threshold comparator is a linear circuit, hysteresis comparator is not in that sense a linear circuit.

Once feedback(from output) is applied to the + terminal of opamp, the situation is truly the reverse of what happens in the linear circuits. A stable state in output kicks off (or commonly said: hysteresis kicks off) at opamp circuit output.
 

devrimaksin

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You can use schmitt triger (using simple
continous comparator with resistive positive feedback
Or you can use cross coupled cmos load as
in used in the LC tank oscillators
 

djalli

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devrimaksin that is correct, a schmidt trigger is a hysteresis comparator.

Can you write more on that last one "cross coupled cmos load as in used in the LC tank oscillators". I am interested to read more detail on it.

thank you devrimaksin
djalli
 
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