HSPICE subcircuit design problem ?

[gstekboy]

I want to design below circuit in HSPICE , Technique used is GDI .



The Code is given below.

* Circuit.
.OPTIONS LIST NODE POST
.TRAN 200P 100N
.PRINT TRAN V(IN) V(OUT)

X1  IN11 IN21 OUT1 AND
X2  IN11 IN22 OUT2 AND
X3  IN12 IN21 OUT3 AND
X4  OUT2 OUT3 OUT4 COUT HALF


.subckt AND INA VCCA OUT
M7 OUT INA 0 5 PCH L=1U W=20U
M8 OUT INA  VCCA 0 NCH L=1U W=40U
.ENDS AND



.subckt HALF B INF OUTF COUTF
M1 OUTB B VCCF 5 PCH L=1U W=20U
M2 OUTB B 0 0 NCH L=1U W=40U
M3 OUTF INF B VCCF PCH L=1U W=20U
M4 OUTF INF OUTB 0 NCH L=1U W=40U

M5 COUTF INF 0 VCCF PCH L=1U W=20U
M6 COUTF INF  B 0 NCH L=1U W=40U

VCC VCCF 0 5

.ENDS HALF

VIN3 IN11 0 0 PULSE 0 5 5N 0N 0N 10N 20N
VIN4 IN21 0 0 PULSE 0 5 0N 0N 0N 10N 20N
VIN5 IN12 0 0 PULSE 0 5 3N 0N 0N 13N 20N
VIN6 IN22 0 0 PULSE 0 5 8N 0N 0N 18N 20N
*CLOAD OUT 0 .00075F
.MODEL PCH PMOS LEVEL=1
.MODEL NCH NMOS LEVEL=1
.END

The problem is with AND gate output V(OUT2) and V(OUT3 , both signal distortes when I'm giving the signal as input to halfadder. (The AND gate output V(OUT1) is acceptable).

Can anyone help me to fix it?

 

[erikl]

I'm not sure if your Spice subckts are ok:

- ADD gate with 2 transistors only? Show your schematic!
- both subckts have a singular node no. 5 (not a voltage!). Not a global node. What is it?
- your VCC VCCF 0 5 supply isn't global, but belongs to HALF

 

[gstekboy]

I'm not sure if your Spice subckts are ok:

- ADD gate with 2 transistors only? Show your schematic!
- both subckts have a singular node no. 5 (not a voltage!). Not a global node. What is it?
- your VCC VCCF 0 5 supply isn't global, but belongs to HALF

1) AND gate implemented using GDI technique has only 2 transistor.
2) It is just a dc voltage source 5V.
3) No importance on that line VCC VCCF 0 5 , you can skip that.

 

[erikl]

2) It is just a dc voltage source 5V.

I'm not sure if this works with SPICE: I think you cannot address a dc voltage here, you should state node names or numbers.