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HSPICE simulation for CNTFET/GNRFET logic circuits.

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Toyona Entwined

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I simulated some logic gates and full adder models with the Stanford CNTFET and Illinois GNRFET device models in HSPICE. For some reason, the pdp and power supply results are the same for all these circuits (1.235e-29). I dont think the codes are wrong and Im using HSPICE 2008.03. I attached the code I used for a 10T full adder model.

Thanks in advance.
 

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