There are open source uC designs aplenty and you
could turn the crank on any of them with whatever
features you think you want or want to eliminate.
Studying them would be instructive, as far as the
reinvention of wheels goes.
A multiproject run giving you tens of dice will set
you back maybe $20K on a far-from-leading-edge
process.
You would presumably want to have a test solution
for wafer probe and packaged part screening. If no
then you confound the development with the
uncertainty of whether any given part is any good.
Tends to make software debug tricky, when you
have no idea whether the uC is itself correct. That
development tends to run to months of engineering
effort (and that's with experienced test engineers
who have been provided the information they need
and the budget for hardware build and test floor
access (presumably you will need to rent the gear
and the operators).
Figure anywhere from $25K for a mid-tier tool set
like Tanner or Silvaco, to $200K+ for Cadence or
Mentor/Synopsys/??? per year.
Now why you'd be looking to do this, when your
end result is an inferior performance, $10K-a-pop
chip that has zero development environment
support (oh, right, your "advanced" OS - but
the compiler, debugger, etc. are ala carte, no?)
eludes me other than the thrill of it all. Like the
time back in the late '70s when I convinced myself
that building my own 8080A computer using wire-wrap
and STD44 cards was going to be really cool.
It wasn't.
This is one of those cases where, if you have to ask
the question, just don't.