How use Verilog modules on VHDL code

[OvErFlO]

I have a problem, I have design a project in VHDL, this project use a SRAM, but the functional module of SRAM is in verilog.It's possibles recall verilog module in VHDL ?

I have try to traslate verilog code to VHDL with XHDL, but it insert in vhdl code more unknow function like :

HASH( )
WRITE ( )
TO_STRING
TO_INTEGER

and more error, like :

No feasible entries for infix operator "<".
Type error resolving infix expression "<".

It's possible use another way ?

thanks

 

[echo47]

Which software are you using?

When I use Xilinx ISE, I can simply include *.v and *.vhd files into my project, and XST compiles them all together. I can instantiate VHDL modules into my Verilog by using an ordinary Verilog module instance. I didn't try the other way around, but I imagine it would work fine. What error messages are you getting?

I haven't found any tool that does a decent job converting Verilog <--> VHDL. I tried X-HDL3 and one or two others whose names I forget.