How to write my stuff on RAM blocks in spartan IIE

[shakeebh]

synplify + initializing block ram

Dear all,

i m doing my semester project of making a pipelined 16 bit RISC machine on an FPGA. considering all the trash in the way of interfacing a memory with processors, I want to use my ram blocks for both instruction and data memory. but I have got no clue as to how i can write instructions on those block rams. Do i need to write some specific device targeted code or something else to tell my synthesizer/programmer to write data (which would be instructions) into the instruction memory (which would be a RAM block in my spartan device) when programming the device? If yes, would some one of you knowing it kindly tell me how? I have my semester ending and have got lot more things to do besides and cant really go through the whole doc stuff of xilinx to find my answer.

thanks

 

[echo47]

Do you want to initialize the block RAMs with data so it will be available as soon as you configure the FPGA?
What size block RAMs do you need, and are you using the parity bits?
What development tools are you using? ISE, Synplify, ...? Which version?
VHDL or Verilog?
Do you need to simulate the initialized block RAMs in something like ModelSim?

I ask those questions because initializing block RAMs can be tedious and confusing.

Also see these two ISE manuals:
Libraries Guide -> Design Elements -> RAMB16_Sm_Sn
Constraints Guide -> Alphabetized List of Xilinx Constraints -> INIT_xx and INITP_xx

 

[shakeebh]

first of all I thank u for taking ur time to answer my post. yes i want to initiallize the ram block with data available in it as soon as the fpga is programmed so that program counter could start reading the ram block for instructions immediately. I need ram of size 8(address input) by 16 (data bits) or simply 256 by 16. At the moment I have ISE 6.1 with modelsim for simulation purposes. I have done the coding in verilog and for ur last question, yes it would be great if i am able to simulate that ram block in modelsim too.

 

[Sparc]

You can use Coregen for instantiating 256X16 RAM, which 'll be using RAM Blocks. ISE 6.3i supports this but 6.1 should also support this.
For initializing whatever echo47 has answered. 'll help you.
For simulating them in ModelSim you 'll have to do Post P&R simulation. This is very time consuming.
So u can check the outputs, by using Arrays in place of RAMs.

 

[echo47]

It's too bad that Verilog provides poor support for initializing anything. Both ISE and ModelSim support block RAM initialization, but they use different syntax, so you have to put both formats into your Verilog. And it's ugly syntax!

Here is a 1Kx18 dual-port ROM initialized with a sine table. I use both ports so I can read sine and cosine simultaneously. You can convert it to RAM by hooking up the write signals. Notice how I used MATLAB to generate the horrible syntax required to initialize the RAM. If you need only 16 bits, then you can omit the INITP_xx lines.

Down at the bottom I show another (simpler?) method that works for ROM, but not RAM.

Sparc, the defparam lines work fine in ModelSim before P&R. I think ISE 7.1 now accepts defparam, so it's no longer necessary to have the semi-duplicate "synthesis attribute" lines. However, 7.1 is chock-full-o-bugs and semi-useless.

Sorry about the long lines, but that's the way I write code.

module ROMsincos (clk, iaddr, ocos, osin);
  input                 clk;
  input           [9:0] iaddr;
  output signed  [17:0] ocos, osin;

  RAMB16_S18_S18 ROMsin (.CLKA(clk), .CLKB(clk), .DIA(16'd0), .DIPA(2'd0), .ADDRA(iaddr+10'h100), .ENA(1'b1), .WEA(1'b0), .DOA(ocos[17:2]), .DOPA(ocos[1:0]), .DIB(16'd0), .DIPB(2'd0), .ADDRB(iaddr), .ENB(1'b1), .WEB(1'b0), .DOB(osin[17:2]), .DOPB(osin[1:0]));
  // synthesis translate_off
  defparam ROMsin.INIT_00 =256'h0BC30AFB0A33096A08A207D907100647057F04B603ED0324025B019200C90000;
  defparam ROMsin.INIT_01 =256'h1833176D16A815E2151B1455138E12C81201113A10720FAB0EE30E1B0D530C8B;
  defparam ROMsin.INIT_02 =256'h246723A622E522232161209F1FDC1F1A1E561D931CCF1C0B1B471A8219BD18F8;
  defparam ROMsin.INIT_03 =256'h30412F872ECC2E112D552C992BDC2B1F2A6129A328E52826276726A825E82528;
  defparam ROMsin.INIT_04 =256'h3BA53AF23A40398C38D93824376F36BA3604354D349633DE3326326E31B530FB;
  defparam ROMsin.INIT_05 =256'h467545CD4524447A43D04325427A41CE412140733FC53F173E683DB83D073C56;
  defparam ROMsin.INIT_06 =256'h50974FFB4F5E4EBF4E204D814CE04C3F4B9D4AFB4A5849B4490F486947C3471C;
  defparam ROMsin.INIT_07 =256'h59F3596458D4584257B0571D568A55F5556054C95432539B5302526951CE5133;
  defparam ROMsin.INIT_08 =256'h627161F0616F60EC60685FE35F5D5ED75E4F5DC75D3E5CB45C285B9D5B105A82;
  defparam ROMsin.INIT_09 =256'h69FD698C691968A6683267BC674666CF665765DD656364E8646C63EF637162F1;
  defparam ROMsin.INIT_0A =256'h708370226FC16F5E6EFB6E966E306DC96D626CF96C8F6C246BB76B4A6ADC6A6D;
  defparam ROMsin.INIT_0B =256'h75F475A57555750474B2745F740B73B5735F730772AE725571FA719E714070E2;
  defparam ROMsin.INIT_0C =256'h7A417A0579C8798A794A790978C77884784077FA77B3776C772376D9768D7641;
  defparam ROMsin.INIT_0D =256'h7D627D397D0F7CE37CB77C897C5A7C297BF87BC57B917B5C7B267AEF7AB67A7C;
  defparam ROMsin.INIT_0E =256'h7F4D7F387F217F097EF07ED57EBA7E9D7E7F7E5F7E3F7E1D7DFA7DD67DB07D8A;
  defparam ROMsin.INIT_0F =256'h7FFF7FFD7FFA7FF67FF07FE97FE17FD87FCD7FC27FB57FA77F977F877F757F62;
  defparam ROMsin.INIT_10 =256'h7F757F877F977FA77FB57FC27FCD7FD87FE17FE97FF07FF67FFA7FFD7FFF7FFF;
  defparam ROMsin.INIT_11 =256'h7DB07DD67DFA7E1D7E3F7E5F7E7F7E9D7EBA7ED57EF07F097F217F387F4D7F62;
  defparam ROMsin.INIT_12 =256'h7AB67AEF7B267B5C7B917BC57BF87C297C5A7C897CB77CE37D0F7D397D627D8A;
  defparam ROMsin.INIT_13 =256'h768D76D97723776C77B377FA7840788478C77909794A798A79C87A057A417A7C;
  defparam ROMsin.INIT_14 =256'h7140719E71FA725572AE7307735F73B5740B745F74B27504755575A575F47641;
  defparam ROMsin.INIT_15 =256'h6ADC6B4A6BB76C246C8F6CF96D626DC96E306E966EFB6F5E6FC17022708370E2;
  defparam ROMsin.INIT_16 =256'h637163EF646C64E8656365DD665766CF674667BC683268A66919698C69FD6A6D;
  defparam ROMsin.INIT_17 =256'h5B105B9D5C285CB45D3E5DC75E4F5ED75F5D5FE3606860EC616F61F0627162F1;
  defparam ROMsin.INIT_18 =256'h51CE52695302539B543254C9556055F5568A571D57B0584258D4596459F35A82;
  defparam ROMsin.INIT_19 =256'h47C34869490F49B44A584AFB4B9D4C3F4CE04D814E204EBF4F5E4FFB50975133;
  defparam ROMsin.INIT_1A =256'h3D073DB83E683F173FC54073412141CE427A432543D0447A452445CD4675471C;
  defparam ROMsin.INIT_1B =256'h31B5326E332633DE3496354D360436BA376F382438D9398C3A403AF23BA53C56;
  defparam ROMsin.INIT_1C =256'h25E826A82767282628E529A32A612B1F2BDC2C992D552E112ECC2F87304130FB;
  defparam ROMsin.INIT_1D =256'h19BD1A821B471C0B1CCF1D931E561F1A1FDC209F2161222322E523A624672528;
  defparam ROMsin.INIT_1E =256'h0D530E1B0EE30FAB1072113A120112C8138E1455151B15E216A8176D183318F8;
  defparam ROMsin.INIT_1F =256'h00C90192025B032403ED04B6057F0647071007D908A2096A0A330AFB0BC30C8B;
  defparam ROMsin.INIT_20 =256'hF43CF504F5CDF695F75EF826F8EFF9B8FA81FB4AFC12FCDBFDA4FE6EFF370000;
  defparam ROMsin.INIT_21 =256'hE7CCE892E958EA1EEAE4EBAAEC71ED38EDFFEEC6EF8DF055F11CF1E4F2ACF374;
  defparam ROMsin.INIT_22 =256'hDB98DC59DD1ADDDCDE9EDF60E023E0E6E1A9E26CE330E3F4E4B8E57DE642E707;
  defparam ROMsin.INIT_23 =256'hCFBED078D133D1EFD2AAD367D423D4E1D59ED65CD71AD7D9D898D958DA17DAD8;
  defparam ROMsin.INIT_24 =256'hC45BC50DC5C0C673C727C7DBC890C946C9FCCAB2CB69CC21CCD9CD91CE4ACF04;
  defparam ROMsin.INIT_25 =256'hB98ABA33BADBBB85BC2FBCDABD85BE32BEDEBF8CC03AC0E8C198C248C2F8C3A9;
  defparam ROMsin.INIT_26 =256'hAF68B004B0A2B140B1DFB27EB31FB3C0B462B504B5A8B64CB6F0B796B83CB8E3;
  defparam ROMsin.INIT_27 =256'hA60CA69BA72CA7BDA84FA8E2A976AA0AAAA0AB36ABCDAC65ACFDAD97AE31AECC;
  defparam ROMsin.INIT_28 =256'h9D8E9E0F9E919F149F97A01CA0A2A128A1B0A238A2C1A34CA3D7A463A4F0A57D;
  defparam ROMsin.INIT_29 =256'h9602967496E6975997CD984398B9993099A99A229A9C9B179B939C119C8F9D0E;
  defparam ROMsin.INIT_2A =256'h8F7C8FDD903E90A19104916991CF9236929E9307937193DC944894B595239592;
  defparam ROMsin.INIT_2B =256'h8A0C8A5A8AAA8AFB8B4D8BA08BF58C4A8CA08CF88D518DAB8E068E628EBF8F1D;
  defparam ROMsin.INIT_2C =256'h85BE85FA8637867686B586F68738877B87C08805884C889488DC8927897289BE;
  defparam ROMsin.INIT_2D =256'h829D82C682F1831C8349837783A683D68407843A846E84A384D9851085498583;
  defparam ROMsin.INIT_2E =256'h80B280C880DE80F68110812A81468163818181A081C181E282058229824F8275;
  defparam ROMsin.INIT_2F =256'h800080028005800A800F8016801E80278032803E804A805980688079808B809E;
  defparam ROMsin.INIT_30 =256'h808B807980688059804A803E80328027801E8016800F800A8005800280008000;
  defparam ROMsin.INIT_31 =256'h824F8229820581E281C181A0818181638146812A811080F680DE80C880B2809E;
  defparam ROMsin.INIT_32 =256'h8549851084D984A3846E843A840783D683A683778349831C82F182C6829D8275;
  defparam ROMsin.INIT_33 =256'h8972892788DC8894884C880587C0877B873886F686B58676863785FA85BE8583;
  defparam ROMsin.INIT_34 =256'h8EBF8E628E068DAB8D518CF88CA08C4A8BF58BA08B4D8AFB8AAA8A5A8A0C89BE;
  defparam ROMsin.INIT_35 =256'h952394B5944893DC93719307929E923691CF9169910490A1903E8FDD8F7C8F1D;
  defparam ROMsin.INIT_36 =256'h9C8F9C119B939B179A9C9A2299A9993098B9984397CD975996E6967496029592;
  defparam ROMsin.INIT_37 =256'hA4F0A463A3D7A34CA2C1A238A1B0A128A0A2A01C9F979F149E919E0F9D8E9D0E;
  defparam ROMsin.INIT_38 =256'hAE31AD97ACFDAC65ABCDAB36AAA0AA0AA976A8E2A84FA7BDA72CA69BA60CA57D;
  defparam ROMsin.INIT_39 =256'hB83CB796B6F0B64CB5A8B504B462B3C0B31FB27EB1DFB140B0A2B004AF68AECC;
  defparam ROMsin.INIT_3A =256'hC2F8C248C198C0E8C03ABF8CBEDEBE32BD85BCDABC2FBB85BADBBA33B98AB8E3;
  defparam ROMsin.INIT_3B =256'hCE4ACD91CCD9CC21CB69CAB2C9FCC946C890C7DBC727C673C5C0C50DC45BC3A9;
  defparam ROMsin.INIT_3C =256'hDA17D958D898D7D9D71AD65CD59ED4E1D423D367D2AAD1EFD133D078CFBECF04;
  defparam ROMsin.INIT_3D =256'hE642E57DE4B8E3F4E330E26CE1A9E0E6E023DF60DE9EDDDCDD1ADC59DB98DAD8;
  defparam ROMsin.INIT_3E =256'hF2ACF1E4F11CF055EF8DEEC6EDFFED38EC71EBAAEAE4EA1EE958E892E7CCE707;
  defparam ROMsin.INIT_3F =256'hFF37FE6EFDA4FCDBFC12FB4AFA81F9B8F8EFF826F75EF695F5CDF504F43CF374;
  defparam ROMsin.INITP_00=256'hD3F23C4FD3DFD07B47A47D0E33282BD7D444B784A6DCDA6F70EC08BFE21B0540;
  defparam ROMsin.INITP_01=256'h5469C480C530315D52037F9BF8692C4E1AA36C0E776F00FA4E793943F06DE4C1;
  defparam ROMsin.INITP_02=256'h0C6DE43F05B1B6C6BC03E776C0E72A92C4E1A4BF9BF70215D530314C084DA457;
  defparam ROMsin.INITP_03=256'h0543922FF880EC37E69CDE684B78445F5FA0A332C1F46B47B41FDF1FC4F23F1D;
  defparam ROMsin.INITP_04=256'h715214C5717570D9CDACD7061128297D7CCC9D8CAE747AE5D064089562390FC0;
  defparam ROMsin.INITP_05=256'hFCEB4C804F1013F7F201D5B958EB24C63AA1E406DDE5005AC6DB1BC150E76C43;
  defparam ROMsin.INITP_06=256'h04E76C150F939E4E94016DDE406D2AB24C63AC95B95D023F7F1013C408C7ACFD;
  defparam ROMsin.INITP_07=256'h0FC1B2255880641D6EB476E8C9D8CCF5F5A0A112435CE9CD9C3575354C521537;
  // synthesis translate_on
  // synthesis attribute INIT_00  ROMsin "0BC30AFB0A33096A08A207D907100647057F04B603ED0324025B019200C90000"
  // synthesis attribute INIT_01  ROMsin "1833176D16A815E2151B1455138E12C81201113A10720FAB0EE30E1B0D530C8B"
  // synthesis attribute INIT_02  ROMsin "246723A622E522232161209F1FDC1F1A1E561D931CCF1C0B1B471A8219BD18F8"
  // synthesis attribute INIT_03  ROMsin "30412F872ECC2E112D552C992BDC2B1F2A6129A328E52826276726A825E82528"
  // synthesis attribute INIT_04  ROMsin "3BA53AF23A40398C38D93824376F36BA3604354D349633DE3326326E31B530FB"
  // synthesis attribute INIT_05  ROMsin "467545CD4524447A43D04325427A41CE412140733FC53F173E683DB83D073C56"
  // synthesis attribute INIT_06  ROMsin "50974FFB4F5E4EBF4E204D814CE04C3F4B9D4AFB4A5849B4490F486947C3471C"
  // synthesis attribute INIT_07  ROMsin "59F3596458D4584257B0571D568A55F5556054C95432539B5302526951CE5133"
  // synthesis attribute INIT_08  ROMsin "627161F0616F60EC60685FE35F5D5ED75E4F5DC75D3E5CB45C285B9D5B105A82"
  // synthesis attribute INIT_09  ROMsin "69FD698C691968A6683267BC674666CF665765DD656364E8646C63EF637162F1"
  // synthesis attribute INIT_0A  ROMsin "708370226FC16F5E6EFB6E966E306DC96D626CF96C8F6C246BB76B4A6ADC6A6D"
  // synthesis attribute INIT_0B  ROMsin "75F475A57555750474B2745F740B73B5735F730772AE725571FA719E714070E2"
  // synthesis attribute INIT_0C  ROMsin "7A417A0579C8798A794A790978C77884784077FA77B3776C772376D9768D7641"
  // synthesis attribute INIT_0D  ROMsin "7D627D397D0F7CE37CB77C897C5A7C297BF87BC57B917B5C7B267AEF7AB67A7C"
  // synthesis attribute INIT_0E  ROMsin "7F4D7F387F217F097EF07ED57EBA7E9D7E7F7E5F7E3F7E1D7DFA7DD67DB07D8A"
  // synthesis attribute INIT_0F  ROMsin "7FFF7FFD7FFA7FF67FF07FE97FE17FD87FCD7FC27FB57FA77F977F877F757F62"
  // synthesis attribute INIT_10  ROMsin "7F757F877F977FA77FB57FC27FCD7FD87FE17FE97FF07FF67FFA7FFD7FFF7FFF"
  // synthesis attribute INIT_11  ROMsin "7DB07DD67DFA7E1D7E3F7E5F7E7F7E9D7EBA7ED57EF07F097F217F387F4D7F62"
  // synthesis attribute INIT_12  ROMsin "7AB67AEF7B267B5C7B917BC57BF87C297C5A7C897CB77CE37D0F7D397D627D8A"
  // synthesis attribute INIT_13  ROMsin "768D76D97723776C77B377FA7840788478C77909794A798A79C87A057A417A7C"
  // synthesis attribute INIT_14  ROMsin "7140719E71FA725572AE7307735F73B5740B745F74B27504755575A575F47641"
  // synthesis attribute INIT_15  ROMsin "6ADC6B4A6BB76C246C8F6CF96D626DC96E306E966EFB6F5E6FC17022708370E2"
  // synthesis attribute INIT_16  ROMsin "637163EF646C64E8656365DD665766CF674667BC683268A66919698C69FD6A6D"
  // synthesis attribute INIT_17  ROMsin "5B105B9D5C285CB45D3E5DC75E4F5ED75F5D5FE3606860EC616F61F0627162F1"
  // synthesis attribute INIT_18  ROMsin "51CE52695302539B543254C9556055F5568A571D57B0584258D4596459F35A82"
  // synthesis attribute INIT_19  ROMsin "47C34869490F49B44A584AFB4B9D4C3F4CE04D814E204EBF4F5E4FFB50975133"
  // synthesis attribute INIT_1A  ROMsin "3D073DB83E683F173FC54073412141CE427A432543D0447A452445CD4675471C"
  // synthesis attribute INIT_1B  ROMsin "31B5326E332633DE3496354D360436BA376F382438D9398C3A403AF23BA53C56"
  // synthesis attribute INIT_1C  ROMsin "25E826A82767282628E529A32A612B1F2BDC2C992D552E112ECC2F87304130FB"
  // synthesis attribute INIT_1D  ROMsin "19BD1A821B471C0B1CCF1D931E561F1A1FDC209F2161222322E523A624672528"
  // synthesis attribute INIT_1E  ROMsin "0D530E1B0EE30FAB1072113A120112C8138E1455151B15E216A8176D183318F8"
  // synthesis attribute INIT_1F  ROMsin "00C90192025B032403ED04B6057F0647071007D908A2096A0A330AFB0BC30C8B"
  // synthesis attribute INIT_20  ROMsin "F43CF504F5CDF695F75EF826F8EFF9B8FA81FB4AFC12FCDBFDA4FE6EFF370000"
  // synthesis attribute INIT_21  ROMsin "E7CCE892E958EA1EEAE4EBAAEC71ED38EDFFEEC6EF8DF055F11CF1E4F2ACF374"
  // synthesis attribute INIT_22  ROMsin "DB98DC59DD1ADDDCDE9EDF60E023E0E6E1A9E26CE330E3F4E4B8E57DE642E707"
  // synthesis attribute INIT_23  ROMsin "CFBED078D133D1EFD2AAD367D423D4E1D59ED65CD71AD7D9D898D958DA17DAD8"
  // synthesis attribute INIT_24  ROMsin "C45BC50DC5C0C673C727C7DBC890C946C9FCCAB2CB69CC21CCD9CD91CE4ACF04"
  // synthesis attribute INIT_25  ROMsin "B98ABA33BADBBB85BC2FBCDABD85BE32BEDEBF8CC03AC0E8C198C248C2F8C3A9"
  // synthesis attribute INIT_26  ROMsin "AF68B004B0A2B140B1DFB27EB31FB3C0B462B504B5A8B64CB6F0B796B83CB8E3"
  // synthesis attribute INIT_27  ROMsin "A60CA69BA72CA7BDA84FA8E2A976AA0AAAA0AB36ABCDAC65ACFDAD97AE31AECC"
  // synthesis attribute INIT_28  ROMsin "9D8E9E0F9E919F149F97A01CA0A2A128A1B0A238A2C1A34CA3D7A463A4F0A57D"
  // synthesis attribute INIT_29  ROMsin "9602967496E6975997CD984398B9993099A99A229A9C9B179B939C119C8F9D0E"
  // synthesis attribute INIT_2A  ROMsin "8F7C8FDD903E90A19104916991CF9236929E9307937193DC944894B595239592"
  // synthesis attribute INIT_2B  ROMsin "8A0C8A5A8AAA8AFB8B4D8BA08BF58C4A8CA08CF88D518DAB8E068E628EBF8F1D"
  // synthesis attribute INIT_2C  ROMsin "85BE85FA8637867686B586F68738877B87C08805884C889488DC8927897289BE"
  // synthesis attribute INIT_2D  ROMsin "829D82C682F1831C8349837783A683D68407843A846E84A384D9851085498583"
  // synthesis attribute INIT_2E  ROMsin "80B280C880DE80F68110812A81468163818181A081C181E282058229824F8275"
  // synthesis attribute INIT_2F  ROMsin "800080028005800A800F8016801E80278032803E804A805980688079808B809E"
  // synthesis attribute INIT_30  ROMsin "808B807980688059804A803E80328027801E8016800F800A8005800280008000"
  // synthesis attribute INIT_31  ROMsin "824F8229820581E281C181A0818181638146812A811080F680DE80C880B2809E"
  // synthesis attribute INIT_32  ROMsin "8549851084D984A3846E843A840783D683A683778349831C82F182C6829D8275"
  // synthesis attribute INIT_33  ROMsin "8972892788DC8894884C880587C0877B873886F686B58676863785FA85BE8583"
  // synthesis attribute INIT_34  ROMsin "8EBF8E628E068DAB8D518CF88CA08C4A8BF58BA08B4D8AFB8AAA8A5A8A0C89BE"
  // synthesis attribute INIT_35  ROMsin "952394B5944893DC93719307929E923691CF9169910490A1903E8FDD8F7C8F1D"
  // synthesis attribute INIT_36  ROMsin "9C8F9C119B939B179A9C9A2299A9993098B9984397CD975996E6967496029592"
  // synthesis attribute INIT_37  ROMsin "A4F0A463A3D7A34CA2C1A238A1B0A128A0A2A01C9F979F149E919E0F9D8E9D0E"
  // synthesis attribute INIT_38  ROMsin "AE31AD97ACFDAC65ABCDAB36AAA0AA0AA976A8E2A84FA7BDA72CA69BA60CA57D"
  // synthesis attribute INIT_39  ROMsin "B83CB796B6F0B64CB5A8B504B462B3C0B31FB27EB1DFB140B0A2B004AF68AECC"
  // synthesis attribute INIT_3A  ROMsin "C2F8C248C198C0E8C03ABF8CBEDEBE32BD85BCDABC2FBB85BADBBA33B98AB8E3"
  // synthesis attribute INIT_3B  ROMsin "CE4ACD91CCD9CC21CB69CAB2C9FCC946C890C7DBC727C673C5C0C50DC45BC3A9"
  // synthesis attribute INIT_3C  ROMsin "DA17D958D898D7D9D71AD65CD59ED4E1D423D367D2AAD1EFD133D078CFBECF04"
  // synthesis attribute INIT_3D  ROMsin "E642E57DE4B8E3F4E330E26CE1A9E0E6E023DF60DE9EDDDCDD1ADC59DB98DAD8"
  // synthesis attribute INIT_3E  ROMsin "F2ACF1E4F11CF055EF8DEEC6EDFFED38EC71EBAAEAE4EA1EE958E892E7CCE707"
  // synthesis attribute INIT_3F  ROMsin "FF37FE6EFDA4FCDBFC12FB4AFA81F9B8F8EFF826F75EF695F5CDF504F43CF374"
  // synthesis attribute INITP_00 ROMsin "D3F23C4FD3DFD07B47A47D0E33282BD7D444B784A6DCDA6F70EC08BFE21B0540"
  // synthesis attribute INITP_01 ROMsin "5469C480C530315D52037F9BF8692C4E1AA36C0E776F00FA4E793943F06DE4C1"
  // synthesis attribute INITP_02 ROMsin "0C6DE43F05B1B6C6BC03E776C0E72A92C4E1A4BF9BF70215D530314C084DA457"
  // synthesis attribute INITP_03 ROMsin "0543922FF880EC37E69CDE684B78445F5FA0A332C1F46B47B41FDF1FC4F23F1D"
  // synthesis attribute INITP_04 ROMsin "715214C5717570D9CDACD7061128297D7CCC9D8CAE747AE5D064089562390FC0"
  // synthesis attribute INITP_05 ROMsin "FCEB4C804F1013F7F201D5B958EB24C63AA1E406DDE5005AC6DB1BC150E76C43"
  // synthesis attribute INITP_06 ROMsin "04E76C150F939E4E94016DDE406D2AB24C63AC95B95D023F7F1013C408C7ACFD"
  // synthesis attribute INITP_07 ROMsin "0FC1B2255880641D6EB476E8C9D8CCF5F5A0A112435CE9CD9C3575354C521537"
endmodule

% MATLAB sine ROM maker. Just paste this into the Command Window:
clear; clc
name = 'ROMsin';     % verilog array name
N = 1024;            % number of points in 360 degrees
sini = round(sin(2 * pi / N * (0:N-1)') * (2^17 - 1));
cosi = round(cos(2 * pi / N * (0:N-1)') * (2^17 - 1));
vhex = [repmat(['      ''h'],1024,1) dec2hex(0:1023,3) repmat([' : sincos <= '],1024,1) repmat('{18''h',1024,1) dec2hex(bitand(reshape(sini,1024,1)+2^32,2^18-1),5) repmat(',18''h',1024,1) dec2hex(bitand(reshape(cosi,1024,1)+2^32,2^18-1),5) repmat('};',1024,1)];
sinhi = reshape(dec2hex(bitshift(bitand(flipud(reshape(sini,16,64))+2^32,2^18-1),-2),4)',64,64)';
sinlo = reshape(bitand(sini+2^32,3),2,512)'; sinlo=reshape(dec2hex(flipud(reshape(sinlo(:,1)+4*sinlo(:,2),64,8)),1)',64,8)';
sin_xst = [[repmat('  // synthesis attribute INIT_',64,1) dec2hex(0:63,2) repmat(['  ' name ' "'],64,1) sinhi repmat('"',64,1)] ; [repmat('  // synthesis attribute INITP_',8,1) dec2hex(0:7,2) repmat([' ' name ' "'],8,1) sinlo repmat('"',8,1)]];
sin_sim = [[repmat(['  defparam ' name '.INIT_'],64,1) dec2hex(0:63,2) repmat(' =256''h',64,1) sinhi repmat(';',64,1)] ; [repmat(['  defparam ' name '.INITP_'],8,1) dec2hex(0:7,2) repmat('=256''h',8,1) sinlo repmat(';',8,1)]];
disp(vhex);
disp('  // synthesis translate_off');
disp(sin_sim);
disp('  // synthesis translate_on');
disp(sin_xst);
clear;

If you only need ROM (not RAM), you can also use a 'case' statement. ISE will infer and initialize block RAMs. However, ISE won't correctly infer the parity bits, so an 18-bit wide ROM will consume two block RAMs.

module ROMfilter (clk, iaddr, ocoeff);
  input                 clk;
  input           [9:0] iaddr;
  reg            [17:0] tap;
  output signed  [17:0] ocoeff;

  assign ocoeff = tap;

  always @ (posedge clk) begin
    case (iaddr)
      'h000 : tap <= 18'h0019E;
      'h001 : tap <= 18'h00179;
      'h002 : tap <= 18'h0021C;
      'h003 : tap <= 18'h002E6;
      'h004 : tap <= 18'h003DC;
      'h005 : tap <= 18'h00502;
      'h006 : tap <= 18'h0065A;
      'h007 : tap <= 18'h007E7;
   <snip>
      'h3FB : tap <= 18'h00623;
      'h3FC : tap <= 18'h00285;
      'h3FD : tap <= 18'h3FF94;
      'h3FE : tap <= 18'h3FE59;
      'h3FF : tap <= 18'h3FE13;
     default: tap <= 18'hx;
    endcase
  end
endmodule

 

[vijay_iit]

hey
u can use coregen for initializing block RAM,
hope u know how to use core-generator, if not
go to start/programs/xilinx/accessories/coregenerator
with the help of help menu u can easily learn how to instantiate the block ram in ur
hdl code............


for simulation

u can use modelsimXEII 5.6a, u can add this modelsim version in ur
xilinx envronment
and u can do behavioural simulation instead of going for post place and route simulation


reg
vijaybabu