How to write a assemble program to control 12bit DAC

[cyw1984]

I decide using 8051 to control 12-bit DAC AD667, output range is 0-10V
anybody know how to write a program??

If I just want to Input 4096 ~~~~
then how the DAC output occurs 4096 (10V)

**broken link removed**

Thanks a lot

 

[cyw1984]

any one can help me???thanks a lot


*****P1... connect 12bit DAC
p3.2 is CS
P3.0 is A0,A1
P3.1 is A2,A3

My program:
ogh 00h
LJMP MAIN

MAIN: MOV a,#0ffh <----test values

MOV P1, A
SETB P3.2
SETB P3.0
CPL P3.1

END

I don't know how to wirte...the program can't not work..anybody help me..thanks

I want to give 111111111111B

output = 10V

HELPHELPHELPHELPHELP

 

[idlebrain]

Hi,
The circuit looks like memory mapped. In that case
Lets assume that /CS line is low when A15-A2 = 10000000000000.

As per the page 8 of the ad667.pdf document for right justified 8 bit interface
X01 loads loads 8 LSBs and X10 loads 4 MSBs where X=15-A2 and 0/1=A1&A0

So the adress of LSB is 0x8001 and MSB is 0x8002
and as per Fig7 in page 7, D11,D10,D9, D8 should be presented in lower nibble.

Finally as do not know much of Assembly, I will write the code in C language. You can convert it to assembly. I can explain you assembly logic too.

#define DAC_LSB   (unsigned char xdata *)0x8001
#define DAC_MSB  (unsigned char xdata *)0x8002

void update_DAC(unsigned short value12bits)
{
    *(DAC_LSB) = (unsigned char) value12bits;
    *(DAC_MSB) = (unsigned char) (value12bits >> 8);
}

The equialant in Assembly could be
1) Load ACC with 8 LSB bits
1) Load DPTR with 0x8001
2) use MOVX to update LSB
3) Load ACC with 4 msb bits
4) Load DPTR with 0x8002
5) use MOVX tu update MSB

You have to use MOVX because it is mapped to external memory. If I find some info I will post the ASM code.


Cheers
idlebrain

 

[IanP]

If you have all 8051's PORTs available, I would connect all 12 bits using, say, P1 as DB0 - DB7 and lower part of P2 as DB8 - DB11.
In this case A3, A2, A1 and A0 are tied low (to 0V).
You can use T0 (P3.4) to control CS ..

If R6 contains D7-D0, and R7 0000 D11-D8 you can do the following:

code ....

MOV P1, R6
MOV P2, R7
CLR P3.4
NOP ; stay with CS low for some time ..
NOP
..
NOP
SETB P3.4 ; CS goes high ..

Obviously this is just a piece of code that sends 12 bits to ADC, and you will need more, but, I think, this is the easiest way of interfacing a 8051-compatibile device to the AD667 ..


Regards,
IanP

 

[idlebrain]

If you have all 8051's PORTs available, I would connect all 12 bits using, say, P1 as DB0 - DB7 and lower part of P2 as DB8 - DB11.
In this case A3, A2, A1 and A0 are tied low (to 0V).
You can use T0 (P3.4) to control CS ..
IanP

Good Idea, It will simplify the logic if free ports are available.


Cheers
idlebrain

 

[cyw1984]

If you have all 8051's PORTs available, I would connect all 12 bits using, say, P1 as DB0 - DB7 and lower part of P2 as DB8 - DB11.
In this case A3, A2, A1 and A0 are tied low (to 0V).
You can use T0 (P3.4) to control CS ..
IanP

Good Idea, It will simplify the logic if free ports are available.


Cheers
idlebrain

Yes..It is so simple....but..it's use 17pin of uP.......
Also, Why I don't USE AD767...it 's no memory map.....
like a simple DAC~~
Thanks

Added after 17 minutes:

Hi,
The circuit looks like memory mapped. In that case
Lets assume that /CS line is low when A15-A2 = 10000000000000.

As per the page 8 of the ad667.pdf document for right justified 8 bit interface
X01 loads loads 8 LSBs and X10 loads 4 MSBs where X=15-A2 and 0/1=A1&A0

So the adress of LSB is 0x8001 and MSB is 0x8002
and as per Fig7 in page 7, D11,D10,D9, D8 should be presented in lower nibble.

Finally as do not know much of Assembly, I will write the code in C language. You can convert it to assembly. I can explain you assembly logic too.

#define DAC_LSB   (unsigned char xdata *)0x8001
#define DAC_MSB  (unsigned char xdata *)0x8002

void update_DAC(unsigned short value12bits)
{
    *(DAC_LSB) = (unsigned char) value12bits;
    *(DAC_MSB) = (unsigned char) (value12bits >> 8);
}

The equialant in Assembly could be
1) Load ACC with 8 LSB bits
1) Load DPTR with 0x8001
2) use MOVX to update LSB
3) Load ACC with 4 msb bits
4) Load DPTR with 0x8002
5) use MOVX tu update MSB

You have to use MOVX because it is mapped to external memory. If I find some info I will post the ASM code.


Cheers
idlebrain

I am sorry
May I use the 8051 given the CS

Also...how to use A15 - A2 address decoder and what is A15 - A2 address decoder

Added after 10 minutes:

Hi,
The circuit looks like memory mapped. In that case
Lets assume that /CS line is low when A15-A2 = 10000000000000.

As per the page 8 of the ad667.pdf document for right justified 8 bit interface
X01 loads loads 8 LSBs and X10 loads 4 MSBs where X=15-A2 and 0/1=A1&A0

So the adress of LSB is 0x8001 and MSB is 0x8002
and as per Fig7 in page 7, D11,D10,D9, D8 should be presented in lower nibble.

Finally as do not know much of Assembly, I will write the code in C language. You can convert it to assembly. I can explain you assembly logic too.

#define DAC_LSB   (unsigned char xdata *)0x8001
#define DAC_MSB  (unsigned char xdata *)0x8002

void update_DAC(unsigned short value12bits)
{
    *(DAC_LSB) = (unsigned char) value12bits;
    *(DAC_MSB) = (unsigned char) (value12bits >> 8);
}

The equialant in Assembly could be
1) Load ACC with 8 LSB bits
1) Load DPTR with 0x8001
2) use MOVX to update LSB
3) Load ACC with 4 msb bits
4) Load DPTR with 0x8002
5) use MOVX tu update MSB

You have to use MOVX because it is mapped to external memory. If I find some info I will post the ASM code.


Cheers
idlebrain

I am sorry
May I use the 8051 given the CS

Also...how to use A15 - A2 address decoder and what is A15 - A2 address decoder

Added after 1 minutes:

Hi,
The circuit looks like memory mapped. In that case
Lets assume that /CS line is low when A15-A2 = 10000000000000.

As per the page 8 of the ad667.pdf document for right justified 8 bit interface
X01 loads loads 8 LSBs and X10 loads 4 MSBs where X=15-A2 and 0/1=A1&A0

So the adress of LSB is 0x8001 and MSB is 0x8002
and as per Fig7 in page 7, D11,D10,D9, D8 should be presented in lower nibble.

Finally as do not know much of Assembly, I will write the code in C language. You can convert it to assembly. I can explain you assembly logic too.

#define DAC_LSB   (unsigned char xdata *)0x8001
#define DAC_MSB  (unsigned char xdata *)0x8002

void update_DAC(unsigned short value12bits)
{
    *(DAC_LSB) = (unsigned char) value12bits;
    *(DAC_MSB) = (unsigned char) (value12bits >> 8);
}

The equialant in Assembly could be
1) Load ACC with 8 LSB bits
1) Load DPTR with 0x8001
2) use MOVX to update LSB
3) Load ACC with 4 msb bits
4) Load DPTR with 0x8002
5) use MOVX tu update MSB

You have to use MOVX because it is mapped to external memory. If I find some info I will post the ASM code.


Cheers
idlebrain

I am sorry
May I use the 8051 given the CS

Also...how to use A15 - A2 address decoder and what is A15 - A2 address decoder

 

[idlebrain]

but..it's use 17pin of uP.......
Also, Why I don't USE AD767...it 's no memory map.....
like a simple DAC~~

Memory map / io map is decided by the hardware design, any chip can be connected as memory map / io map.

What is 17th pin

Also...how to use A15 - A2 address decoder and what is A15 - A2 address decoder

Decoder block is a circuit that enables /CS line to be active for perticular address.
It can be built from logical ics. that means when A15-A2 = some specific address out of system memory and any values of A1, A0. So that DAC chip will be enable when you are accessing only that locations (registers).

Cheers
idlebrain

 

[cyw1984]

1. If I use only one AD667
May I use the 8051 to control trigger the CS??
Port 3.2,Is it OK??
Thanks

Added after 2 minutes:

How to Load DPTR with 0x8001 ...It need not to trigger the AD667??

The equialant in Assembly could be
1) Load ACC with 8 LSB bits
1) Load DPTR with 0x8001
2) use MOVX to update LSB
3) Load ACC with 4 msb bits
4) Load DPTR with 0x8002
5) use MOVX tu update MSB

Added after 16 minutes:

I fixed my program............


(p3.2 is CS
P3.0 is A0,A1
P3.1 is A2,A3 ) <---IS IT OK???HAVE PROBLEM??

ogh 00h
LJMP MAIN

MAIN: MOV a,#111111111111B ;test values

MOV P1, A
CRL P3.2 ; trigger the AD667
NOP
NOP
SETB P3.1
CPL P3.0 ; enable 8 LSB to first latch
CPL P3.1
SETB P3.0; enable 4 MSB to first latch and load the first latch to second latch
NOP
NOP
SETB P3.2 ; No operation of AD667

END


Is it correct??

 

[IanP]

According to the data sheet writing to latches occurs at the rising edge of the CS signal. A0-A3 are only address pins and therefore are not used in the shifting/writing cycle.
So first you need to set LOW the CS, then put data on the DB0-DB7/DB8-DB11 bus and set the adress pins and then set the CS HIGH, and this has to happen twice ..

P3.2=CS
P3.0=A0/A1
P3.1=A2/A3

After reset all PX.X are high ..

CLR P3.2 ; CS goes LOW
CLR P3.0
MOV P1, DATALOW
NOP
NOP
SETB P3.2 ; CS goes high
SETB P3.0
NOP
NOP
CLR P3.2
CLR P3.1
MOV P1, DATAHIGH
NOP
NOP
SETB P3.2
SETB P3.1
NOP
SJMP $ ; endless loop
END

Now, this solution requires 11 mcu pins. The other option with all 12 data pins needs 13 pins (12 for data and one for CS, A0-A3 are connected to 0V). Why don't you like it?

Regards,
IanP

 

[idlebrain]

IanP's solution / program is 100% correct. Hope it will solve your problem.

btw, here is the instruction how to load DPTR

MOV DPTR,#08000H