How to use Perl while coding in Verilog?

[er_sonal]

Hi ,
Can anyone tell me how to use Perl while coding in verilog

 

[beejan]

Re: perl

Hi,

Perl is scripting language and verilog id modeling language. So your qn is not so clear for me. Perl can be used for generating verilog code or even for extracting data from dumped files etc.

 

[er_sonal]

Re: perl

Thanks for the reply.
I wanted to ask ,if my code is in verilog and i want to simulate using PERL.
How to do that.
My tool is VCS

 

[sree205]

perl

what to do is create a perl file which executes the simulator commands using system calls. so, what perl file will be is nothing but a script file which has a sequence of processes to do to generate the waveform.

https://www.altera.com/support/software/nativelink/simulation/vcs/eda_pro_vcs_func_sim.html

look at this link for automatically simulating the design after compiling using VCS.

https://www.perl.com/doc/manual/html/pod/perlfunc/system.html

look at this link on how to invoke system calls using perl.

 

[beejan]

Re: perl

U can try like this in ur perl code.

system ("/tools/ams/bin/eldo temp.cir");

Here I am assuming eldo as the tool name

 

[er_sonal]

Re: perl

Thanks for the reply.

Can u give a more detailed answer.
For example,if i want to simulate an adder which is written in verilog through
Perl ,Can u tell me how to do that.
My tool is VCS

 

[vikadik]

perl

Perl can be used as a wrap around your verilog code. But perl is used as a wrap around only in the backend processes. I have not come across simulating verilog using perl

 

[wangchao]

Re: perl

If you have VCS, you can simulate your verilog code directly. What Perl can do is just to automate the flow, for example, you can use Perl to generate some input data (stimulus), call VCS in perl system call, and then let perl to check the result. But basicly, Perl is just used to control the flow. You can verify your verilog code totally without Perl.

 

[aji_vlsi]

Re: perl

Thanks for the reply.

Can u give a more detailed answer.
For example,if i want to simulate an adder which is written in verilog through
Perl ,Can u tell me how to do that.
My tool is VCS

As other user has pointed out, you won't really need it - as VCS can do it all today. More so with SystemVerilog support. However for education/trial sake, here is a nice link:

**broken link removed**

HTH
Ajeetha, CVC
www.noveldv.com

 

[entropy]

perl

U wanna implement a verilog intepreter in perl language?

 

[manu_leo]

Re: perl

Thanks for the reply.

Can u give a more detailed answer.
For example,if i want to simulate an adder which is written in verilog through
Perl ,Can u tell me how to do that.
My tool is VCS

Hi,

DO you want to automate your simulation using perl i.e run ascript which does simulation and may be takes the results to some other tool. In that case definitely u can use perl script which acts as a wrapper around this.

-manju