Nov 30, 2015 #1 M Manpreet1604 Junior Member level 1 Joined Nov 20, 2015 Messages 15 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,422 Hello, I am using Altera Quartus II Block Diagram/schematic file for cpld programming can anyone guide me how to use JTAG (TDI,TMS,TCK & TDO)pins as a I/O pin in our project because I already routed the board by using those pin.
Hello, I am using Altera Quartus II Block Diagram/schematic file for cpld programming can anyone guide me how to use JTAG (TDI,TMS,TCK & TDO)pins as a I/O pin in our project because I already routed the board by using those pin.
Nov 30, 2015 #2 FvM Super Moderator Staff member Joined Jan 22, 2008 Messages 52,420 Helped 14,749 Reputation 29,780 Reaction score 14,101 Trophy points 1,393 Location Bochum, Germany Activity points 298,099 That's generally not possible, with the exception of the MAX3000 and MAX7000 family which allows to disable the JTAG pins by the parallel programmer.
That's generally not possible, with the exception of the MAX3000 and MAX7000 family which allows to disable the JTAG pins by the parallel programmer.