Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

how to use attribute ram_style for entity?

Status
Not open for further replies.

Port Map

Advanced Member level 4
Joined
Aug 24, 2013
Messages
118
Helped
15
Reputation
30
Reaction score
14
Trophy points
1,298
Activity points
2,089
Hi,
any body knows how to use ram_style attribute for an entity? where I should place the syntax?

syntax is as below:

attribute ram_style : string;
attribute ram_style of <entity_name>: entity is "distributed";​

assume I have a code like below and I want My_Fifo_A to be instantiated with distributed RAMs and My_Fifo_B to be instantiated with block RAMs;

Code:
library IEEE;
use IEEE.std_logic_1164.all;

entity Entity1 is 
     port (
        CLK :  in std_logic;
        A :  in std_logic_vector(7 downto 0);
        B :  in std_logic_vector(7 downto 0)
    );
end entity; 

architecture Behavioral of Entity1 is

signal sSigSLV1	:std_logic_vector(7 downto 0):=(others=>'0');

	component My_Fifo is 
     generic (Size:integer);
	  port (
        CLK :  in std_logic;
        A :  in std_logic_vector(7 downto 0);
        B :  in std_logic_vector(7 downto 0)
    );
	end component; 

begin
	--I want to use a distributed RAM for this entity
	My_Fifo_A: My_Fifo  
     generic map(Size=>10)
	  port map(
        CLK =>CLK,
        A 	=>A,
        B 	=>sSigSLV1
    );

	--I want to use a block RAM for this entity
	My_Fifo_B: My_Fifo  
     generic map(Size=>1000)
	  port map(
        CLK =>CLK,
        A 	=>sSigSLV1,
        B 	=>B
    );	 
	 
end Behavioral;
 

You need to put them after the component, and refer to the label of the entity:

attribute ram_style of My_Fifof_A : label is "distributed";

But I dont know whether ramstyle attribute can be applied to entities. They need to be assigned to the signal that infers the ram. You can pass the attribute through the entity as a generic:

Code:
my_fifo_a : my_fifo
generic map (
  size => 10,
  ramstyle => "dustributed"
);

assuming you create a generic on the entity called "ramstyle"
 
In case you are using FIFO vendor IP, there should be a module parameter specifying the memory type. You need to set this parameter.
 

You need to put them after the component, and refer to the label of the entity:

attribute ram_style of My_Fifof_A : label is "distributed";

But I dont know whether ramstyle attribute can be applied to entities. They need to be assigned to the signal that infers the ram. You can pass the attribute through the entity as a generic:

Code:
my_fifo_a : my_fifo
generic map (
  size => 10,
  ramstyle => "dustributed"
);

assuming you create a generic on the entity called "ramstyle"

OK, thanks, this is a good solution!
but does this mean that we cant use that attribute inside this code, like verilog codes?
In verilog we can have
(* RAM_STYLE="DISTRIBUTED" *)
just before instantiating a module.
 

You can use it, but it must be used on the signal that infers the ram (not the entity). What is the "my_fifo" component? is it custom made or is it a generated FIFO?

If it is custom made, it should be easy enough to pass through a generic.
If it is a generated core, then you can set the ram style when you generate the core (or just set the generics yourself).
 

Thank for your replies.
this question was just for learning the syntax and I want to learn using ram_style for entities not for signals.
(I assumed that "my_fifo" is a custom component).
 

Thank for your replies.
this question was just for learning the syntax and I want to learn using ram_style for entities not for signals.
(I assumed that "my_fifo" is a custom component).

In that case - I would suggest passing it in as a generic and applying the attribute to the signal.
 

Keep in mind that in some cases - using this kind of attribute doesn't guarantee that the tool will infer the logic you want.

I.E - if the logic description contradicts your attributed request - your request will be ignored.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top