Re: Logic Implementation
Look at the first and last terms of your function. They are available complemented right from your 74138: abc'=Y5' and a'b'c=Y4'
So if you feed these to a 2-input NAND gate you get G(a,b,c)=abc'+a'b'c.
The middle term does not use c, so c can be either 0 or 1, that is, it can be either Y1' or Y5'. So you take outputs Y1' and Y5' and feed them to a 2-input NAND gate; that is equivalent to H=ab'c+ab'c'.
So now you have to construct function F.
To do that, you have the first two terms already, and you need OR this last combination:
F=abc'+a'b'c+H=(abc'+a'b'c)'&H'
This is what you do with the third gate, you invert H and apply it to the input of the first NAND gate, to get the required function.
Take a look at the schematic.