Hi all,
I am confused with giving input to the Xilinx CORDIC IP. My target is to use this IP to calculate atan function of 32 bit wide input and take output as 32 bit wide output. So I set configuration as follow.
When instantiating IP, it is asked me to input 64 bit wide data. So in my test bench I gave input as 64 bit wide input by combining x axis coordinate and y axis coordinate. My input is
By the way, can you explain me this one too?
When I configure IP core input width and output width to 10 bits, why instantiation template asks me to give input as 32 bits? And output data width will be also 16 bits? What is this extra 6 bits for?And why?
Thank you.