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How to understand this class-AB output stage?

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It is called Rail-to-rail output stage with floating class-AB control, in Ron Hogervorst's paper "A Compact power-Efficient 3 V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries", anyone can help me understand how it works?

Thanks a lot!

The paper can be found here:
 

Hi,

Kindly see the attachment on how to design a Class AB amplifier.

If you need more details, don't hesitate to contact me.

Regards,

N.Muralidhara
CRL-BEL
 

Thanks for your share.

muralicrl said:
Hi,

Kindly see the attachment on how to design a Class AB amplifier.

If you need more details, don't hesitate to contact me.

Regards,

N.Muralidhara
CRL-BEL
Click to expand...
 

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