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How to tent via with soldermask on Protel, PADS and Allegro?

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Advanced Member level 2
Oct 4, 2004
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I want to know how we can tent via with soldermask on Protel, PADS and Allegro?
Is it possible to make it conditional vi tenting(under some component)?

tented vias

Just do not define solder mask for those vias.
You can have different vias in your design.

Is advisable to add a note on FAB drawing also.


tented via

VIA always has the soldermask and removing it needs a special care. In AD we need to check the via tenting check box of via preperty dialog box.
I need to know to do same job on PADS and Allegro? Do I need to define special VIA or I can edit exiting vias?

solder mask tenting

VIA always has the soldermask and removing it needs a special care.

What do you mean by that? What special care you are referring to?!!!

Simply edit your via pad. Done that many many times.
Is not tool related any tool can do this simple task.

tenting vias


Tenting is a process usually delegated to dry film masks. In this process the via is completely covered to prevent cleaning solutions or flux residue from entering the plated-through hole. An issue still in debate is whether to tent one side or both sides of the via. Many users have different opinions as to which method works best in a good assembly process. With the advent and the increased use of liquid photoimageable masks, the tenting of vias has not always been possible.

The liquid polymer applied to the surface, some solder mask gets into the hole. However, there can be skips or other process conditions where the solder mask does not properly cover or prevent entrance into the barrel of the plated-through hole. Thus, capping* or plugging* has come about. This is usually a secondary process to ensure that plated-through holes are really prevented from being open to contamination from some of the assembly cleaning and plating process chemistries.

Capping - Via holes are Capped with Overplate
Plugging - Via holes are Plugged with LPI mask or DuPont Silver Epoxy

Hope this helps you.


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tenting pcb

You should need a fab note in the fab drawing to describe the via tented.

pcb tenting

is via tenting a common practice in multi-layer board?

tenting via

Absolutely not common. Only some engineers prefer to do so. It depends on personal style.

Anyway, whether tent or not, please noted it out on mechanical drawing to avoid misunderstanding.


Few people will use the via as test points and in that case they remove the solder mask layer from vias or particular via which will be used as test point. When BGA is used in the design and fanout is done, normally vias beneath them is tented to avoid solder flow / shorting.

pcb via tenting

It's better to tent the via holes. If you really want to use these via holes for testing purpose, you can leave only those required with soldermask clearance.

tenting pcb via

if you use QFPs and a huge amount of VIAs under the component, close to the pins, definitely use VIA tenting, at least under the components. this is to avoid short circuit made by left-over soldertin.
also for BGAs, is highly recommended to cover the dogbone-vias. I have tried a board with a BGA and without viatenting. we checked with X-ray. It didnt look good:

normally i specify testpoint-vias, they are not tented, but the others are

Added after 3 hours 4 minutes:

oh, and how do I specify it in Cadence Allegro?
(I used it only in Altium, until now)
what is a tented via

In allegro you can edit the padstack which is used for dog bone structure under BGA area and do not define solder mask bottom.

tenting of vias


i wonder if someone can help me on this topic: i have a via-in-pad, the type you put on exposed pad lands and connect to ground layer and i am using Allegro package designer. so i need to plug those vias to avoid wicking during soldering of the component: In allegro, defining any shape on soldermask layer means an opening; so currently, i create a void to indicate soldermask tenting of the vias... but im not sure this solves the problem... any other ideas besides sending a note with the drawings??

vias tenting

To my opinion, design of via in a pad isn't a problem of PCB tools but a question of PCB manufacturer technology. Sometimes tenting or special soldermask structures are suggested for thermal vias in an exposed pad, e. g. in an Amkor application note:**broken link removed**

The problem is, that depending on the PCB manufacturers technology, such solutions can completely fail according to my experience. So it's generally advisable to check the possible techniques with the manufacturer before finishing the design. Apart from using soldermask for covering the vias, special plugging techniques are available from many PCB manufacturers, including copper plated plugs that allow for vias in BGA or CSP pads. But these techniques require additional processing steps and increase PCB costs.

what is tented vias

make some gerber files! then check with a gerber viewer. it will tell you if your action was successful or not. gerbers dont lie...
tenting a via

Thanks for the replies... i will do as you say Buenos.. i was being lazy but again according to FVM, i think this tenting is not so sure... so im trying this comrpomise: let the solder wicking occur and close via from bottom layer..

tented vias heat

The said Amkor application note finds this result in a comparative test of different solder mask designs:
both via tenting from bottom or via plugging from bottom may result in larger voids due to out-gassing
With one manufacturer, I experienced solder resist traces in the pad area around a via closed from the bottom, thus thermal resistance of the pad was considerably increased. It may be a better solution to use open vias with minimum drill diameter and accept solder wicking, this option also looks good in the Amkor report. However, a assembly service provider feared solder shorts with CSP or MLF devices (packages with planar pads at the bottom) when the device is sucked down to the board.

what is tenting need on via hole on pcb


via on pad technology is process where pcb fab house put fillet on the hole before putting as smt pad to secure metal not to go inside the drill hole. but this technology is a little bit expensive than the usual fabrication process. you wont encounter a DRC violation in allegro for this but as a PCB designer i wont recommend the use of via on pad unless space constraint.

its just my two cent

capped via tented via

I agree, that one should try to use standard technologies as far as possible. If exposed pads have to be contacted, the vias can be probably placed outside the solder area. For higher thermal load, the exposed pad can be e. g. partitioned by two crossing rows of completely tented vias through the center.

If individual tented vias in a exposed pad have to be designed, the solder mask pattern usually has to be assembled from a number of complex shapes. As the CAD system behaviour may be partly surprizing in the reproduction of such shapes, it's strongly recommended to check the results in a gerber viewer as buenos suggested.

tent via holes

this exposed pad is quite big wrt footprint area... its supposed to dissipate heat and short connect to ground... hence suppliers are always mentioning these vias or feedthru holes as a matrix under the pads... so anythign that jeopardizes the low impedance or thermal dissipation is not a solution (correct me if im wrong)... :?:eek:h i dont know.. so whats the cheap and reliable solution? i guess that the assembly house will have some solution...

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