quan228228
Full Member level 4
Hi,
I synthesis a design using bottum-up method. When i finish the core synthesis, how can i set the top constraint for top level?
In top level, it includes IO pads, core design, PHY, PLL etc. how can set set_driving_cell, set_load etc..?
Thanks!
David
I synthesis a design using bottum-up method. When i finish the core synthesis, how can i set the top constraint for top level?
In top level, it includes IO pads, core design, PHY, PLL etc. how can set set_driving_cell, set_load etc..?
Thanks!
David