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How to start implementing transmitter and receiver on fpga using VHDL or verilog

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ashokone

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hi
can anyone suggest me how can i implement transmitter and receiver using verilog r vhdl.. plz let me knw how to start this
 

devas

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Hi,

Open a text editor and start typing:
VHDL:
"library ieee; ...."

Verilog:
"module transmitter(...."
 

Sink0

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Its hard to help you.. its just up to the communication itself. Do you know Verilog or VHDL?
 

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