How to solve zero crossing interpolation?

[kickbeer]

Hello,

I have just simulated my folding and interpolating ADC. The resolution of that ADC is 8 bit with 1.4v full scale input. 1 LSB is about 5.5mV. After i simulated it staticaly(without frequency). The digital output only changed when Vin is 6.9mV or more. Theoritically it will changed at 5.5mV or more. Somehow i found that the zero-crossing might be shifted. How to solve this problem?

Thx in advanced

 

[Fleeta]

Re: zero crossing interpolation

Hello,

I have just simulated my folding and interpolating ADC. The resolution of that ADC is 8 bit with 1.4v full scale input. 1 LSB is about 5.5mV. After i simulated it staticaly(without frequency). The digital output only changed when Vin is 6.9mV or more. Theoritically it will changed at 5.5mV or more. Somehow i found that the zero-crossing might be shifted. How to solve this problem?

Thx in advanced

First, how did you measure the changing voltage is Vin=6.9mV，did you consider the delay time between input and output, maybe is the delay problem.
Second, the linear regions of the folding amplifers should not overlapped with each other, this overlapping maybe the most likely reason.
Last, maybe is the offset of the comparators or the zero-crossing detectors.